1 /* 2 * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef _cl_turing_compute_a_h_ 24 #define _cl_turing_compute_a_h_ 25 26 /* AUTO GENERATED FILE -- DO NOT EDIT */ 27 /* Command: ../../../../class/bin/sw_header.pl turing_compute_a */ 28 29 #include "nvtypes.h" 30 31 #define TURING_COMPUTE_A 0xC5C0 32 33 #define NVC5C0_SET_OBJECT 0x0000 34 #define NVC5C0_SET_OBJECT_CLASS_ID 15:0 35 #define NVC5C0_SET_OBJECT_ENGINE_ID 20:16 36 37 #define NVC5C0_NO_OPERATION 0x0100 38 #define NVC5C0_NO_OPERATION_V 31:0 39 40 #define NVC5C0_SET_NOTIFY_A 0x0104 41 #define NVC5C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 42 43 #define NVC5C0_SET_NOTIFY_B 0x0108 44 #define NVC5C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 45 46 #define NVC5C0_NOTIFY 0x010c 47 #define NVC5C0_NOTIFY_TYPE 31:0 48 #define NVC5C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 49 #define NVC5C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 50 51 #define NVC5C0_WAIT_FOR_IDLE 0x0110 52 #define NVC5C0_WAIT_FOR_IDLE_V 31:0 53 54 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 55 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 56 57 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 58 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 59 60 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 61 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 62 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 63 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 64 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 65 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 66 #define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 67 68 #define NVC5C0_SEND_GO_IDLE 0x013c 69 #define NVC5C0_SEND_GO_IDLE_V 31:0 70 71 #define NVC5C0_PM_TRIGGER 0x0140 72 #define NVC5C0_PM_TRIGGER_V 31:0 73 74 #define NVC5C0_PM_TRIGGER_WFI 0x0144 75 #define NVC5C0_PM_TRIGGER_WFI_V 31:0 76 77 #define NVC5C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 78 #define NVC5C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 79 80 #define NVC5C0_FE_ATOMIC_SEQUENCE_END 0x014c 81 #define NVC5C0_FE_ATOMIC_SEQUENCE_END_V 31:0 82 83 #define NVC5C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 84 #define NVC5C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 85 86 #define NVC5C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 87 #define NVC5C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 88 89 #define NVC5C0_LINE_LENGTH_IN 0x0180 90 #define NVC5C0_LINE_LENGTH_IN_VALUE 31:0 91 92 #define NVC5C0_LINE_COUNT 0x0184 93 #define NVC5C0_LINE_COUNT_VALUE 31:0 94 95 #define NVC5C0_OFFSET_OUT_UPPER 0x0188 96 #define NVC5C0_OFFSET_OUT_UPPER_VALUE 16:0 97 98 #define NVC5C0_OFFSET_OUT 0x018c 99 #define NVC5C0_OFFSET_OUT_VALUE 31:0 100 101 #define NVC5C0_PITCH_OUT 0x0190 102 #define NVC5C0_PITCH_OUT_VALUE 31:0 103 104 #define NVC5C0_SET_DST_BLOCK_SIZE 0x0194 105 #define NVC5C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 106 #define NVC5C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 107 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 108 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 109 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 110 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 111 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 112 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 113 #define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 114 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 115 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 116 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 117 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 118 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 119 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 120 #define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 121 122 #define NVC5C0_SET_DST_WIDTH 0x0198 123 #define NVC5C0_SET_DST_WIDTH_V 31:0 124 125 #define NVC5C0_SET_DST_HEIGHT 0x019c 126 #define NVC5C0_SET_DST_HEIGHT_V 31:0 127 128 #define NVC5C0_SET_DST_DEPTH 0x01a0 129 #define NVC5C0_SET_DST_DEPTH_V 31:0 130 131 #define NVC5C0_SET_DST_LAYER 0x01a4 132 #define NVC5C0_SET_DST_LAYER_V 31:0 133 134 #define NVC5C0_SET_DST_ORIGIN_BYTES_X 0x01a8 135 #define NVC5C0_SET_DST_ORIGIN_BYTES_X_V 20:0 136 137 #define NVC5C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac 138 #define NVC5C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 139 140 #define NVC5C0_LAUNCH_DMA 0x01b0 141 #define NVC5C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 142 #define NVC5C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 143 #define NVC5C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 144 #define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 145 #define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 146 #define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 147 #define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 148 #define NVC5C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 149 #define NVC5C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 150 #define NVC5C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 151 #define NVC5C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 152 #define NVC5C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 153 #define NVC5C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 154 #define NVC5C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 155 #define NVC5C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 156 #define NVC5C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 157 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP 15:13 158 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 159 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 160 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 161 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 162 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 163 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 164 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 165 #define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 166 #define NVC5C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 167 #define NVC5C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 168 #define NVC5C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 169 #define NVC5C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 170 #define NVC5C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 171 #define NVC5C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 172 173 #define NVC5C0_LOAD_INLINE_DATA 0x01b4 174 #define NVC5C0_LOAD_INLINE_DATA_V 31:0 175 176 #define NVC5C0_SET_I2M_SEMAPHORE_A 0x01dc 177 #define NVC5C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 178 179 #define NVC5C0_SET_I2M_SEMAPHORE_B 0x01e0 180 #define NVC5C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 181 182 #define NVC5C0_SET_I2M_SEMAPHORE_C 0x01e4 183 #define NVC5C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 184 185 #define NVC5C0_SET_SM_SCG_CONTROL 0x01e8 186 #define NVC5C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 187 #define NVC5C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 188 #define NVC5C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 189 190 #define NVC5C0_SET_I2M_SPARE_NOOP00 0x01f0 191 #define NVC5C0_SET_I2M_SPARE_NOOP00_V 31:0 192 193 #define NVC5C0_SET_I2M_SPARE_NOOP01 0x01f4 194 #define NVC5C0_SET_I2M_SPARE_NOOP01_V 31:0 195 196 #define NVC5C0_SET_I2M_SPARE_NOOP02 0x01f8 197 #define NVC5C0_SET_I2M_SPARE_NOOP02_V 31:0 198 199 #define NVC5C0_SET_I2M_SPARE_NOOP03 0x01fc 200 #define NVC5C0_SET_I2M_SPARE_NOOP03_V 31:0 201 202 #define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 203 #define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 204 205 #define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 206 #define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 207 208 #define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 209 #define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 210 211 #define NVC5C0_PERFMON_TRANSFER 0x0210 212 #define NVC5C0_PERFMON_TRANSFER_V 31:0 213 214 #define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 215 #define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 216 217 #define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 218 #define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 219 220 #define NVC5C0_INVALIDATE_SHADER_CACHES 0x021c 221 #define NVC5C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 222 #define NVC5C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 223 #define NVC5C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 224 #define NVC5C0_INVALIDATE_SHADER_CACHES_DATA 4:4 225 #define NVC5C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 226 #define NVC5C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 227 #define NVC5C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 228 #define NVC5C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 229 #define NVC5C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 230 #define NVC5C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 231 #define NVC5C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 232 #define NVC5C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 233 #define NVC5C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 234 #define NVC5C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 235 #define NVC5C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 236 237 #define NVC5C0_SET_RESERVED_SW_METHOD00 0x0220 238 #define NVC5C0_SET_RESERVED_SW_METHOD00_V 31:0 239 240 #define NVC5C0_SET_RESERVED_SW_METHOD01 0x0224 241 #define NVC5C0_SET_RESERVED_SW_METHOD01_V 31:0 242 243 #define NVC5C0_SET_RESERVED_SW_METHOD02 0x0228 244 #define NVC5C0_SET_RESERVED_SW_METHOD02_V 31:0 245 246 #define NVC5C0_SET_RESERVED_SW_METHOD03 0x022c 247 #define NVC5C0_SET_RESERVED_SW_METHOD03_V 31:0 248 249 #define NVC5C0_SET_RESERVED_SW_METHOD04 0x0230 250 #define NVC5C0_SET_RESERVED_SW_METHOD04_V 31:0 251 252 #define NVC5C0_SET_RESERVED_SW_METHOD05 0x0234 253 #define NVC5C0_SET_RESERVED_SW_METHOD05_V 31:0 254 255 #define NVC5C0_SET_RESERVED_SW_METHOD06 0x0238 256 #define NVC5C0_SET_RESERVED_SW_METHOD06_V 31:0 257 258 #define NVC5C0_SET_RESERVED_SW_METHOD07 0x023c 259 #define NVC5C0_SET_RESERVED_SW_METHOD07_V 31:0 260 261 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 262 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 263 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 264 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 265 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 266 267 #define NVC5C0_SET_CWD_REF_COUNTER 0x0248 268 #define NVC5C0_SET_CWD_REF_COUNTER_SELECT 5:0 269 #define NVC5C0_SET_CWD_REF_COUNTER_VALUE 23:8 270 271 #define NVC5C0_SET_RESERVED_SW_METHOD08 0x024c 272 #define NVC5C0_SET_RESERVED_SW_METHOD08_V 31:0 273 274 #define NVC5C0_SET_RESERVED_SW_METHOD09 0x0250 275 #define NVC5C0_SET_RESERVED_SW_METHOD09_V 31:0 276 277 #define NVC5C0_SET_RESERVED_SW_METHOD10 0x0254 278 #define NVC5C0_SET_RESERVED_SW_METHOD10_V 31:0 279 280 #define NVC5C0_SET_RESERVED_SW_METHOD11 0x0258 281 #define NVC5C0_SET_RESERVED_SW_METHOD11_V 31:0 282 283 #define NVC5C0_SET_RESERVED_SW_METHOD12 0x025c 284 #define NVC5C0_SET_RESERVED_SW_METHOD12_V 31:0 285 286 #define NVC5C0_SET_RESERVED_SW_METHOD13 0x0260 287 #define NVC5C0_SET_RESERVED_SW_METHOD13_V 31:0 288 289 #define NVC5C0_SET_RESERVED_SW_METHOD14 0x0264 290 #define NVC5C0_SET_RESERVED_SW_METHOD14_V 31:0 291 292 #define NVC5C0_SET_RESERVED_SW_METHOD15 0x0268 293 #define NVC5C0_SET_RESERVED_SW_METHOD15_V 31:0 294 295 #define NVC5C0_SET_SCG_CONTROL 0x0270 296 #define NVC5C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 297 #define NVC5C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 298 #define NVC5C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 299 #define NVC5C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 300 #define NVC5C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 301 302 #define NVC5C0_SET_COMPUTE_CLASS_VERSION 0x0280 303 #define NVC5C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 304 #define NVC5C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 305 306 #define NVC5C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 307 #define NVC5C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 308 #define NVC5C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 309 310 #define NVC5C0_SET_QMD_VERSION 0x0288 311 #define NVC5C0_SET_QMD_VERSION_CURRENT 15:0 312 #define NVC5C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 313 314 #define NVC5C0_CHECK_QMD_VERSION 0x0290 315 #define NVC5C0_CHECK_QMD_VERSION_CURRENT 15:0 316 #define NVC5C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 317 318 #define NVC5C0_INVALIDATE_SKED_CACHES 0x0298 319 #define NVC5C0_INVALIDATE_SKED_CACHES_V 0:0 320 321 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c 322 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 323 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 324 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 325 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 326 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 327 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 328 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 329 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 330 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 331 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 332 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 333 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 334 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 335 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 336 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 337 #define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 338 339 #define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 340 #define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 341 342 #define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 343 #define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 344 345 #define NVC5C0_SCG_HYSTERESIS_CONTROL 0x02a8 346 #define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 347 #define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 348 #define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 349 #define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 350 #define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 351 #define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 352 353 #define NVC5C0_SET_CWD_SLOT_COUNT 0x02b0 354 #define NVC5C0_SET_CWD_SLOT_COUNT_V 7:0 355 356 #define NVC5C0_SEND_PCAS_A 0x02b4 357 #define NVC5C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 358 359 #define NVC5C0_SEND_PCAS_B 0x02b8 360 #define NVC5C0_SEND_PCAS_B_FROM 23:0 361 #define NVC5C0_SEND_PCAS_B_DELTA 31:24 362 363 #define NVC5C0_SEND_SIGNALING_PCAS_B 0x02bc 364 #define NVC5C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 365 #define NVC5C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 366 #define NVC5C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 367 #define NVC5C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 368 #define NVC5C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 369 #define NVC5C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 370 371 #define NVC5C0_SET_SKED_CACHE_CONTROL 0x02cc 372 #define NVC5C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 373 #define NVC5C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 374 #define NVC5C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 375 376 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 377 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 378 379 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 380 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 381 382 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec 383 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 384 385 #define NVC5C0_SET_SPA_VERSION 0x0310 386 #define NVC5C0_SET_SPA_VERSION_MINOR 7:0 387 #define NVC5C0_SET_SPA_VERSION_MAJOR 15:8 388 389 #define NVC5C0_SET_INLINE_QMD_ADDRESS_A 0x0318 390 #define NVC5C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 391 392 #define NVC5C0_SET_INLINE_QMD_ADDRESS_B 0x031c 393 #define NVC5C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 394 395 #define NVC5C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) 396 #define NVC5C0_LOAD_INLINE_QMD_DATA_V 31:0 397 398 #define NVC5C0_SET_FALCON00 0x0500 399 #define NVC5C0_SET_FALCON00_V 31:0 400 401 #define NVC5C0_SET_FALCON01 0x0504 402 #define NVC5C0_SET_FALCON01_V 31:0 403 404 #define NVC5C0_SET_FALCON02 0x0508 405 #define NVC5C0_SET_FALCON02_V 31:0 406 407 #define NVC5C0_SET_FALCON03 0x050c 408 #define NVC5C0_SET_FALCON03_V 31:0 409 410 #define NVC5C0_SET_FALCON04 0x0510 411 #define NVC5C0_SET_FALCON04_V 31:0 412 413 #define NVC5C0_SET_FALCON05 0x0514 414 #define NVC5C0_SET_FALCON05_V 31:0 415 416 #define NVC5C0_SET_FALCON06 0x0518 417 #define NVC5C0_SET_FALCON06_V 31:0 418 419 #define NVC5C0_SET_FALCON07 0x051c 420 #define NVC5C0_SET_FALCON07_V 31:0 421 422 #define NVC5C0_SET_FALCON08 0x0520 423 #define NVC5C0_SET_FALCON08_V 31:0 424 425 #define NVC5C0_SET_FALCON09 0x0524 426 #define NVC5C0_SET_FALCON09_V 31:0 427 428 #define NVC5C0_SET_FALCON10 0x0528 429 #define NVC5C0_SET_FALCON10_V 31:0 430 431 #define NVC5C0_SET_FALCON11 0x052c 432 #define NVC5C0_SET_FALCON11_V 31:0 433 434 #define NVC5C0_SET_FALCON12 0x0530 435 #define NVC5C0_SET_FALCON12_V 31:0 436 437 #define NVC5C0_SET_FALCON13 0x0534 438 #define NVC5C0_SET_FALCON13_V 31:0 439 440 #define NVC5C0_SET_FALCON14 0x0538 441 #define NVC5C0_SET_FALCON14_V 31:0 442 443 #define NVC5C0_SET_FALCON15 0x053c 444 #define NVC5C0_SET_FALCON15_V 31:0 445 446 #define NVC5C0_SET_FALCON16 0x0540 447 #define NVC5C0_SET_FALCON16_V 31:0 448 449 #define NVC5C0_SET_FALCON17 0x0544 450 #define NVC5C0_SET_FALCON17_V 31:0 451 452 #define NVC5C0_SET_FALCON18 0x0548 453 #define NVC5C0_SET_FALCON18_V 31:0 454 455 #define NVC5C0_SET_FALCON19 0x054c 456 #define NVC5C0_SET_FALCON19_V 31:0 457 458 #define NVC5C0_SET_FALCON20 0x0550 459 #define NVC5C0_SET_FALCON20_V 31:0 460 461 #define NVC5C0_SET_FALCON21 0x0554 462 #define NVC5C0_SET_FALCON21_V 31:0 463 464 #define NVC5C0_SET_FALCON22 0x0558 465 #define NVC5C0_SET_FALCON22_V 31:0 466 467 #define NVC5C0_SET_FALCON23 0x055c 468 #define NVC5C0_SET_FALCON23_V 31:0 469 470 #define NVC5C0_SET_FALCON24 0x0560 471 #define NVC5C0_SET_FALCON24_V 31:0 472 473 #define NVC5C0_SET_FALCON25 0x0564 474 #define NVC5C0_SET_FALCON25_V 31:0 475 476 #define NVC5C0_SET_FALCON26 0x0568 477 #define NVC5C0_SET_FALCON26_V 31:0 478 479 #define NVC5C0_SET_FALCON27 0x056c 480 #define NVC5C0_SET_FALCON27_V 31:0 481 482 #define NVC5C0_SET_FALCON28 0x0570 483 #define NVC5C0_SET_FALCON28_V 31:0 484 485 #define NVC5C0_SET_FALCON29 0x0574 486 #define NVC5C0_SET_FALCON29_V 31:0 487 488 #define NVC5C0_SET_FALCON30 0x0578 489 #define NVC5C0_SET_FALCON30_V 31:0 490 491 #define NVC5C0_SET_FALCON31 0x057c 492 #define NVC5C0_SET_FALCON31_V 31:0 493 494 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 495 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 496 497 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 498 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 499 500 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 501 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 502 503 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 504 #define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 505 506 #define NVC5C0_SET_SHADER_CACHE_CONTROL 0x0d94 507 #define NVC5C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 508 #define NVC5C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 509 #define NVC5C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 510 511 #define NVC5C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) 512 #define NVC5C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 513 514 #define NVC5C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 515 #define NVC5C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 516 517 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 518 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 519 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 520 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 521 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 522 523 #define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 524 #define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 525 #define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 526 #define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 527 528 #define NVC5C0_INVALIDATE_SAMPLER_CACHE 0x1330 529 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 530 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 531 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 532 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 533 534 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 535 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 536 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 537 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 538 #define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 539 540 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 541 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 542 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 543 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 544 #define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 545 546 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 547 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 548 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 549 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 550 #define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 551 552 #define NVC5C0_SET_SHADER_EXCEPTIONS 0x1528 553 #define NVC5C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 554 #define NVC5C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 555 #define NVC5C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 556 557 #define NVC5C0_SET_RENDER_ENABLE_A 0x1550 558 #define NVC5C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 559 560 #define NVC5C0_SET_RENDER_ENABLE_B 0x1554 561 #define NVC5C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 562 563 #define NVC5C0_SET_RENDER_ENABLE_C 0x1558 564 #define NVC5C0_SET_RENDER_ENABLE_C_MODE 2:0 565 #define NVC5C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 566 #define NVC5C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 567 #define NVC5C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 568 #define NVC5C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 569 #define NVC5C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 570 571 #define NVC5C0_SET_TEX_SAMPLER_POOL_A 0x155c 572 #define NVC5C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 573 574 #define NVC5C0_SET_TEX_SAMPLER_POOL_B 0x1560 575 #define NVC5C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 576 577 #define NVC5C0_SET_TEX_SAMPLER_POOL_C 0x1564 578 #define NVC5C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 579 580 #define NVC5C0_SET_TEX_HEADER_POOL_A 0x1574 581 #define NVC5C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 582 583 #define NVC5C0_SET_TEX_HEADER_POOL_B 0x1578 584 #define NVC5C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 585 586 #define NVC5C0_SET_TEX_HEADER_POOL_C 0x157c 587 #define NVC5C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 588 589 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 590 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 591 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 592 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 593 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 594 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 595 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 596 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 597 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 598 #define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 599 600 #define NVC5C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 601 #define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 602 #define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 603 #define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 604 #define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 605 606 #define NVC5C0_PIPE_NOP 0x1a2c 607 #define NVC5C0_PIPE_NOP_V 31:0 608 609 #define NVC5C0_SET_SPARE00 0x1a30 610 #define NVC5C0_SET_SPARE00_V 31:0 611 612 #define NVC5C0_SET_SPARE01 0x1a34 613 #define NVC5C0_SET_SPARE01_V 31:0 614 615 #define NVC5C0_SET_SPARE02 0x1a38 616 #define NVC5C0_SET_SPARE02_V 31:0 617 618 #define NVC5C0_SET_SPARE03 0x1a3c 619 #define NVC5C0_SET_SPARE03_V 31:0 620 621 #define NVC5C0_SET_REPORT_SEMAPHORE_A 0x1b00 622 #define NVC5C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 623 624 #define NVC5C0_SET_REPORT_SEMAPHORE_B 0x1b04 625 #define NVC5C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 626 627 #define NVC5C0_SET_REPORT_SEMAPHORE_C 0x1b08 628 #define NVC5C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 629 630 #define NVC5C0_SET_REPORT_SEMAPHORE_D 0x1b0c 631 #define NVC5C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 632 #define NVC5C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 633 #define NVC5C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 634 #define NVC5C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 635 #define NVC5C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 636 #define NVC5C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 637 #define NVC5C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 638 #define NVC5C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 639 #define NVC5C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 640 #define NVC5C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 641 #define NVC5C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 642 #define NVC5C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 643 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 644 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 645 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 646 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 647 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 648 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 649 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 650 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 651 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 652 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 653 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 654 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 655 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 656 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 657 #define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 658 #define NVC5C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 659 #define NVC5C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 660 #define NVC5C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 661 662 #define NVC5C0_SET_TRAP_HANDLER_A 0x25f8 663 #define NVC5C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 664 665 #define NVC5C0_SET_TRAP_HANDLER_B 0x25fc 666 #define NVC5C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 667 668 #define NVC5C0_SET_BINDLESS_TEXTURE 0x2608 669 #define NVC5C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 670 671 #define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) 672 #define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 673 674 #define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) 675 #define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 676 677 #define NVC5C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 678 #define NVC5C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 679 680 #define NVC5C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 681 #define NVC5C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 682 683 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) 684 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 685 686 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) 687 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 688 689 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) 690 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 691 692 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) 693 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 694 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 695 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 696 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 697 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 698 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 699 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 700 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 701 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 702 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 703 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 704 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 705 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 706 707 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) 708 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 709 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 710 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 711 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 712 713 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc 714 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 715 716 #define NVC5C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 717 #define NVC5C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 718 719 #define NVC5C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 720 #define NVC5C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 721 722 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 723 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 724 725 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec 726 #define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 727 728 #define NVC5C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) 729 #define NVC5C0_SET_MME_SHADOW_SCRATCH_V 31:0 730 731 #endif /* _cl_turing_compute_a_h_ */ 732