1 #ifndef __CB_BDK_CSR_H__
2 #define __CB_BDK_CSR_H__
3 /***********************license start***********************************
4 * Copyright (c) 2003-2017 Cavium Inc. ([email protected]). All rights
5 * reserved.
6 *
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are
10 * met:
11 *
12 * * Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 *
15 * * Redistributions in binary form must reproduce the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer in the documentation and/or other materials provided
18 * with the distribution.
19 *
20 * * Neither the name of Cavium Inc. nor the names of
21 * its contributors may be used to endorse or promote products
22 * derived from this software without specific prior written
23 * permission.
24 *
25 * This Software, including technical data, may be subject to U.S. export
26 * control laws, including the U.S. Export Administration Act and its
27 * associated regulations, and may be subject to export or import
28 * regulations in other countries.
29 *
30 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
31 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
32 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT
33 * TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
34 * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
35 * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
36 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
37 * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT,
38 * QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK
39 * ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
40 ***********************license end**************************************/
41
42 //#include <libbdk-arch/bdk-csrs-rst.h> /* FIXME: circular dependency with this header */
43 #include <libbdk-hal/bdk-clock.h> /* FIXME(dhendrix): added */
44
45 /**
46 * @file
47 *
48 * Functions and macros for accessing Cavium CSRs.
49 *
50 * <hr>$Revision: 49448 $<hr>
51 *
52 * @defgroup csr CSR support
53 * @{
54 */
55
56 /**
57 * Possible CSR bus types
58 */
59 typedef enum {
60 BDK_CSR_TYPE_DAB, /**< External debug 64bit CSR */
61 BDK_CSR_TYPE_DAB32b, /**< External debug 32bit CSR */
62 BDK_CSR_TYPE_MDSB, /**< CN93XX: Memory Diagnostic Serial Bus?, not memory mapped */
63 BDK_CSR_TYPE_NCB, /**< Fast 64bit CSR */
64 BDK_CSR_TYPE_NCB32b, /**< Fast 32bit CSR */
65 BDK_CSR_TYPE_PCCBR,
66 BDK_CSR_TYPE_PCCPF,
67 BDK_CSR_TYPE_PCCVF,
68 BDK_CSR_TYPE_PCICONFIGRC, /**< PCIe config address (RC mode) */
69 BDK_CSR_TYPE_PCICONFIGEP, /**< PCIe config address (EP mode) */
70 BDK_CSR_TYPE_PCICONFIGEP_SHADOW, /**< CN93XX: PCIEP register invisible to host, not memory mapped */
71 BDK_CSR_TYPE_PCICONFIGEPVF, /**< CN93XX: PCIEP registers only on vertain PEMs, not memory mapped */
72 BDK_CSR_TYPE_PEXP, /**< PCIe BAR 0 address only */
73 BDK_CSR_TYPE_PEXP_NCB, /**< NCB-direct and PCIe BAR0 address */
74 BDK_CSR_TYPE_RSL, /**< Slow 64bit CSR */
75 BDK_CSR_TYPE_RSL32b, /**< Slow 32bit CSR */
76 BDK_CSR_TYPE_RVU_PF_BAR0, /**< Index into RVU PF BAR0 */
77 BDK_CSR_TYPE_RVU_PF_BAR2, /**< Index into RVU PF BAR2 */
78 BDK_CSR_TYPE_RVU_PFVF_BAR2, /**< Index into RVU PF or VF BAR2 */
79 BDK_CSR_TYPE_RVU_VF_BAR2, /**< Index into RVU VF BAR2 */
80 BDK_CSR_TYPE_SYSREG, /**< Core system register */
81 } bdk_csr_type_t;
82
83 #define BDK_CSR_DB_MAX_PARAM 4
84 typedef struct __attribute__ ((packed)) {
85 uint32_t name_index : 20;/**< Index into __bdk_csr_db_string where the name is */
86 uint32_t base_index : 14;/**< Index into __bdk_csr_db_number where the base address is */
87 uint8_t unused : 5;
88 bdk_csr_type_t type : 5; /**< Enum type from above */
89 uint8_t width : 4; /**< CSR width in bytes */
90 uint16_t field_index; /**< Index into __bdk_csr_db_fieldList where the fields start */
91 uint16_t range[BDK_CSR_DB_MAX_PARAM]; /**< Index into __bdk_csr_db_range where the range is */
92 uint16_t param_inc[BDK_CSR_DB_MAX_PARAM]; /**< Index into __bdk_csr_db_number where the param multiplier is */
93 } __bdk_csr_db_type_t;
94
95 typedef struct __attribute__ ((packed)) {
96 uint32_t name_index : 20;/**< Index into __bdk_csr_db_string where the name is */
97 uint32_t start_bit : 6; /**< LSB of the field */
98 uint32_t stop_bit : 6; /**< MSB of the field */
99 } __bdk_csr_db_field_t;
100
101 typedef struct {
102 uint32_t model;
103 const int16_t *data; /**< Array of integers indexing __bdk_csr_db_csr */
104 } __bdk_csr_db_map_t;
105
106 extern void __bdk_csr_fatal(const char *name, int num_args, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4) __attribute__ ((noreturn));
107 extern int bdk_csr_decode(const char *name, uint64_t value);
108 extern int bdk_csr_field(const char *csr_name, int field_start_bit, const char **field_name);
109 extern uint64_t bdk_csr_read_by_name(bdk_node_t node, const char *name);
110 extern int bdk_csr_write_by_name(bdk_node_t node, const char *name, uint64_t value);
111 extern int __bdk_csr_lookup_index(const char *name, int params[]);
112 extern int bdk_csr_get_name(const char *last_name, char *buffer);
113 struct bdk_readline_tab;
114 extern struct bdk_readline_tab *__bdk_csr_get_tab_complete(void) BDK_WEAK;
115 extern uint64_t bdk_sysreg_read(int node, int core, uint64_t regnum);
116 extern void bdk_sysreg_write(int node, int core, uint64_t regnum, uint64_t value);
117
118 #ifndef BDK_BUILD_HOST
119
120 /**
121 * Read a value from a CSR. Normally this function should not be
122 * used directly. Instead use the macro BDK_CSR_READ that fills
123 * in the parameters to this function for you.
124 *
125 * @param node Node to use in a Numa setup. Can be an exact ID or a special value.
126 * @param type Bus type the CSR is on
127 * @param busnum Bus number the CSR is on
128 * @param size Width of the CSR in bytes
129 * @param address The address of the CSR
130 *
131 * @return The value of the CSR
132 */
133 /* FIXME(dhendrix): Moved __bdk_csr_read_slow out of the function body... */
134 extern uint64_t __bdk_csr_read_slow(bdk_node_t node, bdk_csr_type_t type, int busnum, int size, uint64_t address);
135 static inline uint64_t bdk_csr_read(bdk_node_t node, bdk_csr_type_t type, int busnum, int size, uint64_t address) __attribute__ ((always_inline));
bdk_csr_read(bdk_node_t node,bdk_csr_type_t type,int busnum,int size,uint64_t address)136 static inline uint64_t bdk_csr_read(bdk_node_t node, bdk_csr_type_t type, int busnum, int size, uint64_t address)
137 {
138 switch (type)
139 {
140 case BDK_CSR_TYPE_DAB:
141 case BDK_CSR_TYPE_DAB32b:
142 case BDK_CSR_TYPE_NCB:
143 case BDK_CSR_TYPE_NCB32b:
144 case BDK_CSR_TYPE_PEXP_NCB:
145 case BDK_CSR_TYPE_RSL:
146 case BDK_CSR_TYPE_RSL32b:
147 case BDK_CSR_TYPE_RVU_PF_BAR0:
148 case BDK_CSR_TYPE_RVU_PF_BAR2:
149 case BDK_CSR_TYPE_RVU_PFVF_BAR2:
150 case BDK_CSR_TYPE_RVU_VF_BAR2:
151 address |= (uint64_t)(node&3) << 44;
152 /* Note: This code assume a 1:1 mapping of all of address space.
153 It is designed to run with the MMU disabled */
154 switch (size)
155 {
156 case 1:
157 return *(volatile uint8_t *)address;
158 case 2:
159 return bdk_le16_to_cpu(*(volatile uint16_t *)address);
160 case 4:
161 return bdk_le32_to_cpu(*(volatile uint32_t *)address);
162 default:
163 return bdk_le64_to_cpu(*(volatile uint64_t *)address);
164 }
165 default:
166 return __bdk_csr_read_slow(node, type, busnum, size, address);
167 }
168 }
169
170
171 /**
172 * Wrate a value to a CSR. Normally this function should not be
173 * used directly. Instead use the macro BDK_CSR_WRITE that fills
174 * in the parameters to this function for you.
175 *
176 * @param node Node to use in a Numa setup. Can be an exact ID or a special value.
177 * @param type Bus type the CSR is on
178 * @param busnum Bus number the CSR is on
179 * @param size Width of the CSR in bytes
180 * @param address The address of the CSR
181 * @param value Value to write to the CSR
182 */
183 /* FIXME(dhendrix): Moved __bdk_csr_write_slow out of the function body... */
184 extern void __bdk_csr_write_slow(bdk_node_t node, bdk_csr_type_t type, int busnum, int size, uint64_t address, uint64_t value);
185 static inline void bdk_csr_write(bdk_node_t node, bdk_csr_type_t type, int busnum, int size, uint64_t address, uint64_t value) __attribute__ ((always_inline));
bdk_csr_write(bdk_node_t node,bdk_csr_type_t type,int busnum,int size,uint64_t address,uint64_t value)186 static inline void bdk_csr_write(bdk_node_t node, bdk_csr_type_t type, int busnum, int size, uint64_t address, uint64_t value)
187 {
188 switch (type)
189 {
190 case BDK_CSR_TYPE_DAB:
191 case BDK_CSR_TYPE_DAB32b:
192 case BDK_CSR_TYPE_NCB:
193 case BDK_CSR_TYPE_NCB32b:
194 case BDK_CSR_TYPE_PEXP_NCB:
195 case BDK_CSR_TYPE_RSL:
196 case BDK_CSR_TYPE_RSL32b:
197 case BDK_CSR_TYPE_RVU_PF_BAR0:
198 case BDK_CSR_TYPE_RVU_PF_BAR2:
199 case BDK_CSR_TYPE_RVU_PFVF_BAR2:
200 case BDK_CSR_TYPE_RVU_VF_BAR2:
201 address |= (uint64_t)(node&3) << 44;
202 /* Note: This code assume a 1:1 mapping of all of address space.
203 It is designed to run with the MMU disabled */
204 switch (size)
205 {
206 case 1:
207 *(volatile uint8_t *)address = value;
208 break;
209 case 2:
210 *(volatile uint16_t *)address = bdk_cpu_to_le16(value);
211 break;
212 case 4:
213 *(volatile uint32_t *)address = bdk_cpu_to_le32(value);
214 break;
215 default:
216 *(volatile uint64_t *)address = bdk_cpu_to_le64(value);
217 break;
218 }
219 break;
220
221 default:
222 __bdk_csr_write_slow(node, type, busnum, size, address, value);
223 }
224 }
225
226 #else
227 #define bdk_csr_read thunder_remote_read_csr
228 #define bdk_csr_write thunder_remote_write_csr
229 #endif
230
231 /**
232 * This macro makes it easy to define a variable of the correct
233 * type for a CSR.
234 */
235 #define BDK_CSR_DEFINE(name, csr) typedef_##csr name
236
237 /**
238 * This macro makes it easy to define a variable and initialize it
239 * with a CSR.
240 */
241 #define BDK_CSR_INIT(name, node, csr) typedef_##csr name = {.u = bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), csr)}
242
243 /**
244 * Macro to read a CSR
245 */
246 #define BDK_CSR_READ(node, csr) bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), csr)
247
248 /**
249 * Macro to write a CSR
250 */
251 #define BDK_CSR_WRITE(node, csr, value) bdk_csr_write(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), csr, value)
252
253 /**
254 * Macro to make a read, modify, and write sequence easy. The "code_block"
255 * should be replaced with a C code block or a comma separated list of
256 * "name.s.field = value", without the quotes.
257 */
258 #define BDK_CSR_MODIFY(name, node, csr, code_block) do { \
259 uint64_t _tmp_address = csr; \
260 typedef_##csr name = {.u = bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), _tmp_address)}; \
261 code_block; \
262 bdk_csr_write(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), _tmp_address, name.u); \
263 } while (0)
264
265 /**
266 * This macro spins on a field waiting for it to reach a value. It
267 * is common in code to need to wait for a specific field in a CSR
268 * to match a specific value. Conceptually this macro expands to:
269 *
270 * 1) read csr at "address" with a csr typedef of "type"
271 * 2) Check if ("type".s."field" "op" "value")
272 * 3) If #2 isn't true loop to #1 unless too much time has passed.
273 */
274 /* FIXME(dhendrix): removed bdk_thread_yield() */
275 #if 0
276 #define BDK_CSR_WAIT_FOR_FIELD(node, csr, field, op, value, timeout_usec) \
277 ({int result; \
278 do { \
279 uint64_t done = bdk_clock_get_count(BDK_CLOCK_TIME) + (uint64_t)timeout_usec * \
280 bdk_clock_get_rate(bdk_numa_local(), BDK_CLOCK_TIME) / 1000000; \
281 typedef_##csr c; \
282 uint64_t _tmp_address = csr; \
283 while (1) \
284 { \
285 c.u = bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), _tmp_address); \
286 if ((c.s.field) op (value)) { \
287 result = 0; \
288 break; \
289 } else if (bdk_clock_get_count(BDK_CLOCK_TIME) > done) { \
290 result = -1; \
291 break; \
292 } else \
293 bdk_thread_yield(); \
294 } \
295 } while (0); \
296 result;})
297 #endif
298 #define BDK_CSR_WAIT_FOR_FIELD(node, csr, field, op, value, timeout_usec) \
299 ({int result; \
300 do { \
301 uint64_t done = bdk_clock_get_count(BDK_CLOCK_TIME) + (uint64_t)timeout_usec * \
302 bdk_clock_get_rate(bdk_numa_local(), BDK_CLOCK_TIME) / 1000000; \
303 typedef_##csr c; \
304 uint64_t _tmp_address = csr; \
305 while (1) \
306 { \
307 c.u = bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), _tmp_address); \
308 if ((c.s.field) op (value)) { \
309 result = 0; \
310 break; \
311 } else if (bdk_clock_get_count(BDK_CLOCK_TIME) > done) { \
312 result = -1; \
313 break; \
314 } \
315 } \
316 } while (0); \
317 result;})
318
319 /**
320 * This macro spins on a field waiting for it to reach a value. It
321 * is common in code to need to wait for a specific field in a CSR
322 * to match a specific value. Conceptually this macro expands to:
323 *
324 * 1) read csr at "address" with a csr typedef of "type"
325 * 2) Check if ("type"."chip"."field" "op" "value")
326 * 3) If #2 isn't true loop to #1 unless too much time has passed.
327 *
328 * Note that usage of this macro should be avoided. When future chips
329 * change bit locations, the compiler will not catch those changes
330 * with this macro. Changes silently do the wrong thing at runtime.
331 */
332 /* FIXME(dhendrix): removed bdk_thread_yield() */
333 #if 0
334 #define BDK_CSR_WAIT_FOR_CHIP_FIELD(node, csr, chip, field, op, value, timeout_usec) \
335 ({int result; \
336 do { \
337 uint64_t done = bdk_clock_get_count(BDK_CLOCK_TIME) + (uint64_t)timeout_usec * \
338 bdk_clock_get_rate(bdk_numa_local(), BDK_CLOCK_TIME) / 1000000; \
339 typedef_##csr c; \
340 uint64_t _tmp_address = csr; \
341 while (1) \
342 { \
343 c.u = bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), _tmp_address); \
344 if ((c.chip.field) op (value)) { \
345 result = 0; \
346 break; \
347 } else if (bdk_clock_get_count(BDK_CLOCK_TIME) > done) { \
348 result = -1; \
349 break; \
350 } else \
351 bdk_thread_yield(); \
352 } \
353 } while (0); \
354 result;})
355 #endif
356 #define BDK_CSR_WAIT_FOR_CHIP_FIELD(node, csr, chip, field, op, value, timeout_usec) \
357 ({int result; \
358 do { \
359 uint64_t done = bdk_clock_get_count(BDK_CLOCK_TIME) + (uint64_t)timeout_usec * \
360 bdk_clock_get_rate(bdk_numa_local(), BDK_CLOCK_TIME) / 1000000; \
361 typedef_##csr c; \
362 uint64_t _tmp_address = csr; \
363 while (1) \
364 { \
365 c.u = bdk_csr_read(node, bustype_##csr, busnum_##csr, sizeof(typedef_##csr), _tmp_address); \
366 if ((c.chip.field) op (value)) { \
367 result = 0; \
368 break; \
369 } else if (bdk_clock_get_count(BDK_CLOCK_TIME) > done) { \
370 result = -1; \
371 break; \
372 } \
373 } \
374 } while (0); \
375 result;})
376
377 /** @} */
378 #endif
379