1 // 2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved. 3 // SPDX-License-Identifier: MIT 4 // 5 #pragma once 6 7 #include <armnn/Types.hpp> 8 #include <armnn/backends/WorkloadInfo.hpp> 9 10 namespace armnn 11 { 12 13 namespace experimental 14 { 15 16 struct ExecutionData; 17 18 } // end experimental namespace 19 20 using namespace armnn::experimental; 21 22 /// Workload interface to enqueue a layer computation. 23 class IWorkload { 24 public: ~IWorkload()25 virtual ~IWorkload() {} 26 27 // Note: do not call for async networks via ExecuteAsync or otherwise, 28 // as async networks memory is allocated outside the workload. 29 virtual void PostAllocationConfigure() = 0; 30 31 virtual void Execute() const = 0; 32 33 virtual void ExecuteAsync(ExecutionData& executionData) = 0; 34 35 virtual arm::pipe::ProfilingGuid GetGuid() const = 0; 36 37 // SupportsTensorHandleReplacement signals that a given workload is capable of 38 // replacing any of its I/O tensors via ReplaceInput/OutputTensorHandle 39 virtual bool SupportsTensorHandleReplacement() const = 0; 40 41 // Replace input tensor handle with the given TensorHandle 42 virtual void ReplaceInputTensorHandle(ITensorHandle* /*input*/, unsigned int /*slot*/) = 0; 43 44 // Replace output tensor handle with the given TensorHandle 45 virtual void ReplaceOutputTensorHandle(ITensorHandle* /*output*/, unsigned int /*slot*/) = 0; 46 RegisterDebugCallback(const DebugCallbackFunction &)47 virtual void RegisterDebugCallback(const DebugCallbackFunction& /*func*/) {} 48 GetMemoryRequirements()49 virtual armnn::Optional<armnn::MemoryRequirements> GetMemoryRequirements() 50 { 51 return armnn::EmptyOptional(); 52 } 53 }; 54 55 } //namespace armnn 56