1 /*
2 * Copyright (c) 2017 The WebM project authors. All Rights Reserved.
3 *
4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree.
9 */
10
11 #include <arm_neon.h>
12
13 #include "./vpx_config.h"
14 #include "./vpx_dsp_rtcd.h"
15 #include "vpx_dsp/txfm_common.h"
16 #include "vpx_dsp/vpx_dsp_common.h"
17 #include "vpx_dsp/arm/idct_neon.h"
18 #include "vpx_dsp/arm/fdct_neon.h"
19 #include "vpx_dsp/arm/mem_neon.h"
20 #include "vpx_dsp/arm/transpose_neon.h"
21 #include "vpx_dsp/arm/fdct4x4_neon.h"
22
vpx_fdct4x4_neon(const int16_t * input,tran_low_t * final_output,int stride)23 void vpx_fdct4x4_neon(const int16_t *input, tran_low_t *final_output,
24 int stride) {
25 // input[M * stride] * 16
26 int16x4_t in[4];
27 in[0] = vshl_n_s16(vld1_s16(input + 0 * stride), 4);
28 in[1] = vshl_n_s16(vld1_s16(input + 1 * stride), 4);
29 in[2] = vshl_n_s16(vld1_s16(input + 2 * stride), 4);
30 in[3] = vshl_n_s16(vld1_s16(input + 3 * stride), 4);
31
32 // If the very first value != 0, then add 1.
33 if (input[0] != 0) {
34 const int16x4_t one = vreinterpret_s16_s64(vdup_n_s64(1));
35 in[0] = vadd_s16(in[0], one);
36 }
37 vpx_fdct4x4_pass1_neon(in);
38 vpx_fdct4x4_pass2_neon(in);
39 {
40 // Not quite a rounding shift. Only add 1 despite shifting by 2.
41 const int16x8_t one = vdupq_n_s16(1);
42 int16x8_t out_01 = vcombine_s16(in[0], in[1]);
43 int16x8_t out_23 = vcombine_s16(in[2], in[3]);
44 out_01 = vshrq_n_s16(vaddq_s16(out_01, one), 2);
45 out_23 = vshrq_n_s16(vaddq_s16(out_23, one), 2);
46 store_s16q_to_tran_low(final_output + 0 * 8, out_01);
47 store_s16q_to_tran_low(final_output + 1 * 8, out_23);
48 }
49 }
50
51 #if CONFIG_VP9_HIGHBITDEPTH
52
vpx_highbd_fdct4x4_neon(const int16_t * input,tran_low_t * final_output,int stride)53 void vpx_highbd_fdct4x4_neon(const int16_t *input, tran_low_t *final_output,
54 int stride) {
55 const int32x4_t const_one = vdupq_n_s32(1);
56
57 // input[M * stride] * 16
58 int32x4_t in[4];
59 in[0] = vshll_n_s16(vld1_s16(input + 0 * stride), 4);
60 in[1] = vshll_n_s16(vld1_s16(input + 1 * stride), 4);
61 in[2] = vshll_n_s16(vld1_s16(input + 2 * stride), 4);
62 in[3] = vshll_n_s16(vld1_s16(input + 3 * stride), 4);
63
64 // If the very first value != 0, then add 1.
65 if (input[0] != 0) {
66 static const int32_t k1000[4] = { 1, 0, 0, 0 };
67 in[0] = vaddq_s32(in[0], vld1q_s32(k1000));
68 }
69
70 vpx_highbd_fdct4x4_pass1_neon(in);
71 vpx_highbd_fdct4x4_pass1_neon(in);
72 {
73 // Not quite a rounding shift. Only add 1 despite shifting by 2.
74 in[0] = vshrq_n_s32(vaddq_s32(in[0], const_one), 2);
75 in[1] = vshrq_n_s32(vaddq_s32(in[1], const_one), 2);
76 in[2] = vshrq_n_s32(vaddq_s32(in[2], const_one), 2);
77 in[3] = vshrq_n_s32(vaddq_s32(in[3], const_one), 2);
78
79 vst1q_s32(final_output, in[0]);
80 vst1q_s32(final_output + 4, in[1]);
81 vst1q_s32(final_output + 8, in[2]);
82 vst1q_s32(final_output + 12, in[3]);
83 }
84 }
85 #endif // CONFIG_VP9_HIGHBITDEPTH
86