xref: /aosp_15_r20/external/coreboot/src/arch/riscv/include/arch/boot.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef ARCH_RISCV_INCLUDE_ARCH_BOOT_H
4 #define ARCH_RISCV_INCLUDE_ARCH_BOOT_H
5 
6 #define RISCV_PAYLOAD_MODE_U 0
7 #define RISCV_PAYLOAD_MODE_S 1
8 #define RISCV_PAYLOAD_MODE_M 3
9 
10 struct prog;
11 void run_payload(struct prog *prog, void *fdt, int payload_mode);
12 void run_payload_opensbi(struct prog *prog, void *fdt, struct prog *opensbi, int payload_mode);
13 
14 void run_opensbi(const int hart_id,
15 		 const void *opensbi,
16 		 const void *fdt,
17 		 const void *payload,
18 		 const int payload_mode);
19 #endif
20