1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef AMD_BLOCK_BIOSRAM_H 4 #define AMD_BLOCK_BIOSRAM_H 5 6 #include <stdint.h> 7 8 /* Any new chipset and board must implement cbmem_top() for both 9 * romstage and ramstage to support early features like COLLECT_TIMESTAMPS 10 * and CBMEM_CONSOLE. With AMD it is necessary to have cbmem_top() 11 * value stored in nvram to enable early recovery on S3 path. 12 */ 13 void backup_top_of_low_cacheable(uintptr_t ramtop); 14 uintptr_t restore_top_of_low_cacheable(void); 15 16 /* Returns the bootblock C entry point for APs */ 17 void *get_ap_entry_ptr(void); 18 /* Used by BSP to store the bootblock entry point for APs */ 19 void set_ap_entry_ptr(void *entry); 20 /* Saves the UMA size returned by AGESA */ 21 void save_uma_size(uint32_t size); 22 /* Saves the UMA base address returned by AGESA */ 23 void save_uma_base(uint64_t base); 24 /* Returns the saved UMA size */ 25 uint32_t get_uma_size(void); 26 /* Returns the saved UMA base */ 27 uint64_t get_uma_base(void); 28 29 #endif /* AMD_BLOCK_BIOSRAM_H */ 30