xref: /aosp_15_r20/external/mesa3d/src/asahi/compiler/agx_nir_lower_shared_bitsize.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright 2022 Alyssa Rosenzweig
3  * SPDX-License-Identifier: MIT
4  */
5 
6 #include "compiler/nir/nir_builder.h"
7 #include "agx_compiler.h"
8 
9 /* Local memory instructions require 16-bit offsets, so we add conversions. */
10 static bool
pass(struct nir_builder * b,nir_intrinsic_instr * intr,UNUSED void * data)11 pass(struct nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *data)
12 {
13    switch (intr->intrinsic) {
14    case nir_intrinsic_load_shared:
15    case nir_intrinsic_store_shared:
16    case nir_intrinsic_shared_atomic:
17    case nir_intrinsic_shared_atomic_swap:
18       break;
19    default:
20       return false;
21    }
22 
23    nir_src *offset = nir_get_io_offset_src(intr);
24    if (nir_src_bit_size(*offset) == 16)
25       return false;
26 
27    b->cursor = nir_before_instr(&intr->instr);
28    nir_src_rewrite(offset, nir_u2u16(b, offset->ssa));
29    return true;
30 }
31 
32 bool
agx_nir_lower_shared_bitsize(nir_shader * shader)33 agx_nir_lower_shared_bitsize(nir_shader *shader)
34 {
35    return nir_shader_intrinsics_pass(shader, pass, nir_metadata_control_flow,
36                                      NULL);
37 }
38