1 /*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifdef __aarch64__
26
27 template<>
interleave_block(bfloat16 * & out_ptr,const float * const * in,size_t width,size_t height,size_t row_offset,bool)28 void interleave_block<8, 4, VLType::None, false>(
29 bfloat16 * &out_ptr, const float * const * in, size_t width, size_t height,
30 size_t row_offset, bool
31 )
32 {
33 __asm__ __volatile__(
34 "ldr x27, [%x[in], #0x0]\n"
35 "cmp %x[height], #0x8\n"
36 "ldr x26, [%x[in], #0x8]\n"
37 "add x27, x27, %x[row_offset], LSL #2\n"
38 "ldr x25, [%x[in], #0x10]\n"
39 "ldr x24, [%x[in], #0x18]\n"
40 "add x26, x26, %x[row_offset], LSL #2\n"
41 "ldr x23, [%x[in], #0x20]\n"
42 "add x25, x25, %x[row_offset], LSL #2\n"
43 "ldr x22, [%x[in], #0x28]\n"
44 "ldr x21, [%x[in], #0x30]\n"
45 "add x24, x24, %x[row_offset], LSL #2\n"
46 "ldr x20, [%x[in], #0x38]\n"
47 "add x23, x23, %x[row_offset], LSL #2\n"
48 "add x22, x22, %x[row_offset], LSL #2\n"
49 "add x21, x21, %x[row_offset], LSL #2\n"
50 "add x20, x20, %x[row_offset], LSL #2\n"
51 "beq 1f\n"
52 "mov x20, x27\n"
53 "cmp %x[height], #0x2\n"
54 "csel x26, x26, x27, GE\n"
55 "csel x25, x25, x27, GT\n"
56 "cmp %x[height], #0x4\n"
57 "csel x24, x24, x27, GE\n"
58 "csel x23, x23, x27, GT\n"
59 "cmp %x[height], #0x6\n"
60 "csel x22, x22, x27, GE\n"
61 "csel x21, x21, x27, GT\n"
62 "1:" // no_pointer_adj
63 "prfm pldl1keep, [x27, #0x0]\n"
64 "cmp %x[width], #0x4\n"
65 "prfm pldl1keep, [x26, #0x0]\n"
66 "prfm pldl1keep, [x25, #0x0]\n"
67 "prfm pldl1keep, [x24, #0x0]\n"
68 "prfm pldl1keep, [x23, #0x0]\n"
69 "prfm pldl1keep, [x22, #0x0]\n"
70 "prfm pldl1keep, [x21, #0x0]\n"
71 "prfm pldl1keep, [x20, #0x0]\n"
72 "prfm pldl1keep, [x27, #0x40]\n"
73 "prfm pldl1keep, [x26, #0x40]\n"
74 "prfm pldl1keep, [x25, #0x40]\n"
75 "prfm pldl1keep, [x24, #0x40]\n"
76 "prfm pldl1keep, [x23, #0x40]\n"
77 "prfm pldl1keep, [x22, #0x40]\n"
78 "prfm pldl1keep, [x21, #0x40]\n"
79 "prfm pldl1keep, [x20, #0x40]\n"
80 "blt 3f\n"
81 "2:" // Main loop head
82 "ldr q23, [x27], #0x10\n"
83 ".inst 0x0ea16af7 // bfcvtn v23.4h, v23.4s\n"
84 "ldr q22, [x26], #0x10\n"
85 "subs %x[width], %x[width], #0x4\n"
86 ".inst 0x4ea16ad7 // bfcvtn2 v23.8h, v22.4s\n"
87 "ldr q21, [x25], #0x10\n"
88 "cmp %x[width], #0x4\n"
89 ".inst 0x0ea16ab5 // bfcvtn v21.4h, v21.4s\n"
90 "ldr q20, [x24], #0x10\n"
91 "ldr q18, [x23], #0x10\n"
92 ".inst 0x4ea16a95 // bfcvtn2 v21.8h, v20.4s\n"
93 "ldr q19, [x22], #0x10\n"
94 ".inst 0x0ea16a52 // bfcvtn v18.4h, v18.4s\n"
95 "ldr q16, [x21], #0x10\n"
96 "ldr q17, [x20], #0x10\n"
97 ".inst 0x4ea16a72 // bfcvtn2 v18.8h, v19.4s\n"
98 "prfm pldl1keep, [x27, #0x70]\n"
99 "prfm pldl1keep, [x26, #0x70]\n"
100 ".inst 0x0ea16a10 // bfcvtn v16.4h, v16.4s\n"
101 "prfm pldl1keep, [x25, #0x70]\n"
102 ".inst 0x4ea16a30 // bfcvtn2 v16.8h, v17.4s\n"
103 "prfm pldl1keep, [x24, #0x70]\n"
104 "prfm pldl1keep, [x23, #0x70]\n"
105 "prfm pldl1keep, [x22, #0x70]\n"
106 "prfm pldl1keep, [x21, #0x70]\n"
107 "prfm pldl1keep, [x20, #0x70]\n"
108 "str q23, [%x[out_ptr], #0x0]\n"
109 "str q21, [%x[out_ptr], #0x10]\n"
110 "str q18, [%x[out_ptr], #0x20]\n"
111 "str q16, [%x[out_ptr], #0x30]\n"
112 "add %x[out_ptr], %x[out_ptr], #0x40\n"
113 "bge 2b\n"
114 "3:" // Main loop skip
115 "cbz %x[width], 6f\n"
116 "tbz %x[width], #1, 4f\n"
117 "ldr d23, [x27], #0x8\n"
118 "ldr d22, [x26], #0x8\n"
119 "mov x19, #0x1\n"
120 "ldr d21, [x25], #0x8\n"
121 "ldr d20, [x24], #0x8\n"
122 "ldr d18, [x23], #0x8\n"
123 "ldr d19, [x22], #0x8\n"
124 "ldr d16, [x21], #0x8\n"
125 "ldr d17, [x20], #0x8\n"
126 "tbz %x[width], #0, 5f\n"
127 "ld1 { v23.s }[2], [x27]\n"
128 "ld1 { v22.s }[2], [x26]\n"
129 "ld1 { v21.s }[2], [x25]\n"
130 "ld1 { v20.s }[2], [x24]\n"
131 "ld1 { v18.s }[2], [x23]\n"
132 "ld1 { v19.s }[2], [x22]\n"
133 "ld1 { v16.s }[2], [x21]\n"
134 "ld1 { v17.s }[2], [x20]\n"
135 "b 5f\n"
136 "4:" // odd_loads_1_0
137 "ldr s23, [x27, #0x0]\n"
138 "mov x19, #0x1\n"
139 "ldr s22, [x26, #0x0]\n"
140 "ldr s21, [x25, #0x0]\n"
141 "ldr s20, [x24, #0x0]\n"
142 "ldr s18, [x23, #0x0]\n"
143 "ldr s19, [x22, #0x0]\n"
144 "ldr s16, [x21, #0x0]\n"
145 "ldr s17, [x20, #0x0]\n"
146 "5:" // Odd load end
147 ".inst 0x0ea16af7 // bfcvtn v23.4h, v23.4s\n"
148 ".inst 0x0ea16ab5 // bfcvtn v21.4h, v21.4s\n"
149 ".inst 0x0ea16a52 // bfcvtn v18.4h, v18.4s\n"
150 ".inst 0x0ea16a10 // bfcvtn v16.4h, v16.4s\n"
151 ".inst 0x4ea16ad7 // bfcvtn2 v23.8h, v22.4s\n"
152 "str q23, [%x[out_ptr], #0x0]\n"
153 ".inst 0x4ea16a95 // bfcvtn2 v21.8h, v20.4s\n"
154 ".inst 0x4ea16a72 // bfcvtn2 v18.8h, v19.4s\n"
155 "str q21, [%x[out_ptr], #0x10]\n"
156 ".inst 0x4ea16a30 // bfcvtn2 v16.8h, v17.4s\n"
157 "str q18, [%x[out_ptr], #0x20]\n"
158 "str q16, [%x[out_ptr], #0x30]\n"
159 "add %x[out_ptr], %x[out_ptr], #0x40\n"
160 "6:" // Odds skip
161
162 : [out_ptr] "+&r" (out_ptr), [width] "+&r" (width)
163 : [height] "r" (height), [in] "r" (in), [row_offset] "r" (row_offset)
164 : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27"
165 );
166 }
167
168
169 #endif // __aarch64__
170