1 /*
2 * Copyright (c) 2019-2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifdef __aarch64__
26
27 template<>
interleave_block(bfloat16 * & out_ptr,const bfloat16 * const * in,size_t width,size_t height,size_t row_offset,bool)28 void interleave_block<8, 2, VLType::None, false>(
29 bfloat16 * &out_ptr, const bfloat16 * const * in, size_t width, size_t height,
30 size_t row_offset, bool
31 )
32 {
33 __asm__ __volatile__(
34 "ldr x27, [%x[in], #0x0]\n"
35 "cmp %x[height], #0x8\n"
36 "ldr x26, [%x[in], #0x8]\n"
37 "add x27, x27, %x[row_offset], LSL #1\n"
38 "ldr x25, [%x[in], #0x10]\n"
39 "ldr x24, [%x[in], #0x18]\n"
40 "add x26, x26, %x[row_offset], LSL #1\n"
41 "ldr x23, [%x[in], #0x20]\n"
42 "add x25, x25, %x[row_offset], LSL #1\n"
43 "ldr x22, [%x[in], #0x28]\n"
44 "ldr x21, [%x[in], #0x30]\n"
45 "add x24, x24, %x[row_offset], LSL #1\n"
46 "ldr x20, [%x[in], #0x38]\n"
47 "add x23, x23, %x[row_offset], LSL #1\n"
48 "add x22, x22, %x[row_offset], LSL #1\n"
49 "add x21, x21, %x[row_offset], LSL #1\n"
50 "add x20, x20, %x[row_offset], LSL #1\n"
51 "beq 1f\n"
52 "mov x20, x27\n"
53 "cmp %x[height], #0x2\n"
54 "csel x26, x26, x27, GE\n"
55 "csel x25, x25, x27, GT\n"
56 "cmp %x[height], #0x4\n"
57 "csel x24, x24, x27, GE\n"
58 "csel x23, x23, x27, GT\n"
59 "cmp %x[height], #0x6\n"
60 "csel x22, x22, x27, GE\n"
61 "csel x21, x21, x27, GT\n"
62 "1:" // no_pointer_adj
63 "prfm pldl1keep, [x27, #0x0]\n"
64 "cmp %x[width], #0x8\n"
65 "prfm pldl1keep, [x26, #0x0]\n"
66 "prfm pldl1keep, [x25, #0x0]\n"
67 "prfm pldl1keep, [x24, #0x0]\n"
68 "prfm pldl1keep, [x23, #0x0]\n"
69 "prfm pldl1keep, [x22, #0x0]\n"
70 "prfm pldl1keep, [x21, #0x0]\n"
71 "prfm pldl1keep, [x20, #0x0]\n"
72 "prfm pldl1keep, [x27, #0x40]\n"
73 "prfm pldl1keep, [x26, #0x40]\n"
74 "prfm pldl1keep, [x25, #0x40]\n"
75 "prfm pldl1keep, [x24, #0x40]\n"
76 "prfm pldl1keep, [x23, #0x40]\n"
77 "prfm pldl1keep, [x22, #0x40]\n"
78 "prfm pldl1keep, [x21, #0x40]\n"
79 "prfm pldl1keep, [x20, #0x40]\n"
80 "blt 3f\n"
81 "2:" // Main loop head
82 "ldr q28, [x27], #0x10\n"
83 "subs %x[width], %x[width], #0x8\n"
84 "ldr q29, [x26], #0x10\n"
85 "cmp %x[width], #0x8\n"
86 "ldr q25, [x25], #0x10\n"
87 "zip1 v22.4s, v28.4s, v25.4s\n"
88 "ldr q21, [x24], #0x10\n"
89 "zip2 v28.4s, v28.4s, v25.4s\n"
90 "ldr q27, [x23], #0x10\n"
91 "ldr q26, [x22], #0x10\n"
92 "zip1 v20.4s, v29.4s, v21.4s\n"
93 "ldr q19, [x21], #0x10\n"
94 "zip2 v25.4s, v29.4s, v21.4s\n"
95 "ldr q24, [x20], #0x10\n"
96 "zip1 v23.4s, v22.4s, v20.4s\n"
97 "prfm pldl1keep, [x27, #0x70]\n"
98 "zip2 v22.4s, v22.4s, v20.4s\n"
99 "prfm pldl1keep, [x26, #0x70]\n"
100 "zip1 v21.4s, v28.4s, v25.4s\n"
101 "prfm pldl1keep, [x25, #0x70]\n"
102 "zip1 v18.4s, v27.4s, v19.4s\n"
103 "prfm pldl1keep, [x24, #0x70]\n"
104 "zip1 v16.4s, v26.4s, v24.4s\n"
105 "prfm pldl1keep, [x23, #0x70]\n"
106 "zip1 v17.4s, v18.4s, v16.4s\n"
107 "prfm pldl1keep, [x22, #0x70]\n"
108 "zip2 v20.4s, v18.4s, v16.4s\n"
109 "prfm pldl1keep, [x21, #0x70]\n"
110 "zip2 v19.4s, v27.4s, v19.4s\n"
111 "prfm pldl1keep, [x20, #0x70]\n"
112 "zip2 v16.4s, v26.4s, v24.4s\n"
113 "str q23, [%x[out_ptr], #0x0]\n"
114 "zip1 v18.4s, v19.4s, v16.4s\n"
115 "str q17, [%x[out_ptr], #0x10]\n"
116 "zip2 v17.4s, v28.4s, v25.4s\n"
117 "str q22, [%x[out_ptr], #0x20]\n"
118 "zip2 v16.4s, v19.4s, v16.4s\n"
119 "str q20, [%x[out_ptr], #0x30]\n"
120 "str q21, [%x[out_ptr], #0x40]\n"
121 "str q18, [%x[out_ptr], #0x50]\n"
122 "str q17, [%x[out_ptr], #0x60]\n"
123 "str q16, [%x[out_ptr], #0x70]\n"
124 "add %x[out_ptr], %x[out_ptr], #0x80\n"
125 "bge 2b\n"
126 "3:" // Main loop skip
127 "cbz %x[width], 8f\n"
128 "tbz %x[width], #2, 5f\n"
129 "ldr d28, [x27], #0x8\n"
130 "ldr d29, [x26], #0x8\n"
131 "ldr d25, [x25], #0x8\n"
132 "ldr d21, [x24], #0x8\n"
133 "ldr d27, [x23], #0x8\n"
134 "ldr d26, [x22], #0x8\n"
135 "ldr d19, [x21], #0x8\n"
136 "ldr d24, [x20], #0x8\n"
137 "tbz %x[width], #1, 4f\n"
138 "ld1 { v28.s }[2], [x27], #0x4\n"
139 "mov x19, #0x3\n"
140 "ld1 { v29.s }[2], [x26], #0x4\n"
141 "ld1 { v25.s }[2], [x25], #0x4\n"
142 "ld1 { v21.s }[2], [x24], #0x4\n"
143 "ld1 { v27.s }[2], [x23], #0x4\n"
144 "ld1 { v26.s }[2], [x22], #0x4\n"
145 "ld1 { v19.s }[2], [x21], #0x4\n"
146 "ld1 { v24.s }[2], [x20], #0x4\n"
147 "tbz %x[width], #0, 7f\n"
148 "ld1 { v28.h }[6], [x27]\n"
149 "mov x19, #0x4\n"
150 "ld1 { v29.h }[6], [x26]\n"
151 "ld1 { v25.h }[6], [x25]\n"
152 "ld1 { v21.h }[6], [x24]\n"
153 "ld1 { v27.h }[6], [x23]\n"
154 "ld1 { v26.h }[6], [x22]\n"
155 "ld1 { v19.h }[6], [x21]\n"
156 "ld1 { v24.h }[6], [x20]\n"
157 "b 7f\n"
158 "4:" // odd_loads_1_4
159 "mov x19, #0x2\n"
160 "tbz %x[width], #0, 7f\n"
161 "ld1 { v28.h }[4], [x27]\n"
162 "ld1 { v29.h }[4], [x26]\n"
163 "mov x19, #0x3\n"
164 "ld1 { v25.h }[4], [x25]\n"
165 "ld1 { v21.h }[4], [x24]\n"
166 "ld1 { v27.h }[4], [x23]\n"
167 "ld1 { v26.h }[4], [x22]\n"
168 "ld1 { v19.h }[4], [x21]\n"
169 "ld1 { v24.h }[4], [x20]\n"
170 "b 7f\n"
171 "5:" // odd_loads_2_0
172 "tbz %x[width], #1, 6f\n"
173 "ldr s28, [x27], #0x4\n"
174 "ldr s29, [x26], #0x4\n"
175 "mov x19, #0x1\n"
176 "ldr s25, [x25], #0x4\n"
177 "ldr s21, [x24], #0x4\n"
178 "ldr s27, [x23], #0x4\n"
179 "ldr s26, [x22], #0x4\n"
180 "ldr s19, [x21], #0x4\n"
181 "ldr s24, [x20], #0x4\n"
182 "tbz %x[width], #0, 7f\n"
183 "ld1 { v28.h }[2], [x27]\n"
184 "mov x19, #0x2\n"
185 "ld1 { v29.h }[2], [x26]\n"
186 "ld1 { v25.h }[2], [x25]\n"
187 "ld1 { v21.h }[2], [x24]\n"
188 "ld1 { v27.h }[2], [x23]\n"
189 "ld1 { v26.h }[2], [x22]\n"
190 "ld1 { v19.h }[2], [x21]\n"
191 "ld1 { v24.h }[2], [x20]\n"
192 "b 7f\n"
193 "6:" // odd_loads_1_0
194 "ldr h28, [x27, #0x0]\n"
195 "mov x19, #0x1\n"
196 "ldr h29, [x26, #0x0]\n"
197 "ldr h25, [x25, #0x0]\n"
198 "ldr h21, [x24, #0x0]\n"
199 "ldr h27, [x23, #0x0]\n"
200 "ldr h26, [x22, #0x0]\n"
201 "ldr h19, [x21, #0x0]\n"
202 "ldr h24, [x20, #0x0]\n"
203 "7:" // Odd load end
204 "zip1 v22.4s, v28.4s, v25.4s\n"
205 "subs x19, x19, #0x1\n"
206 "zip1 v20.4s, v29.4s, v21.4s\n"
207 "zip1 v23.4s, v22.4s, v20.4s\n"
208 "str q23, [%x[out_ptr], #0x0]\n"
209 "zip1 v18.4s, v27.4s, v19.4s\n"
210 "zip1 v16.4s, v26.4s, v24.4s\n"
211 "zip1 v17.4s, v18.4s, v16.4s\n"
212 "str q17, [%x[out_ptr], #0x10]\n"
213 "add %x[out_ptr], %x[out_ptr], #0x20\n"
214 "beq 8f\n"
215 "zip2 v22.4s, v22.4s, v20.4s\n"
216 "str q22, [%x[out_ptr], #0x0]\n"
217 "zip2 v20.4s, v18.4s, v16.4s\n"
218 "subs x19, x19, #0x1\n"
219 "str q20, [%x[out_ptr], #0x10]\n"
220 "add %x[out_ptr], %x[out_ptr], #0x20\n"
221 "beq 8f\n"
222 "zip2 v28.4s, v28.4s, v25.4s\n"
223 "zip2 v25.4s, v29.4s, v21.4s\n"
224 "subs x19, x19, #0x1\n"
225 "zip1 v21.4s, v28.4s, v25.4s\n"
226 "str q21, [%x[out_ptr], #0x0]\n"
227 "zip2 v19.4s, v27.4s, v19.4s\n"
228 "zip2 v16.4s, v26.4s, v24.4s\n"
229 "zip1 v18.4s, v19.4s, v16.4s\n"
230 "str q18, [%x[out_ptr], #0x10]\n"
231 "add %x[out_ptr], %x[out_ptr], #0x20\n"
232 "beq 8f\n"
233 "zip2 v17.4s, v28.4s, v25.4s\n"
234 "str q17, [%x[out_ptr], #0x0]\n"
235 "zip2 v16.4s, v19.4s, v16.4s\n"
236 "str q16, [%x[out_ptr], #0x10]\n"
237 "add %x[out_ptr], %x[out_ptr], #0x20\n"
238 "8:" // Odds skip
239
240 : [out_ptr] "+&r" (out_ptr), [width] "+&r" (width)
241 : [height] "r" (height), [in] "r" (in), [row_offset] "r" (row_offset)
242 : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27"
243 );
244 }
245
246
247 #endif // __aarch64__
248