1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_can_legacy.h 4 * @author MCD Application Team 5 * @brief Header file of CAN HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32L4xx_CAN_LEGACY_H 22 #define __STM32L4xx_CAN_LEGACY_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 #if defined(CAN1) 29 /* Includes ------------------------------------------------------------------*/ 30 #include "stm32l4xx_hal_def.h" 31 32 /** @addtogroup STM32L4xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup CAN 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup CAN_Exported_Types CAN Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL State structures definition 47 */ 48 typedef enum 49 { 50 HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */ 51 HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */ 52 HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */ 53 HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */ 54 HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */ 55 HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */ 56 HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */ 57 HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */ 58 59 }HAL_CAN_StateTypeDef; 60 61 /** 62 * @brief CAN init structure definition 63 */ 64 typedef struct 65 { 66 uint32_t Prescaler; /*!< Specifies the length of a time quantum. 67 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */ 68 69 uint32_t Mode; /*!< Specifies the CAN operating mode. 70 This parameter can be a value of @ref CAN_operating_mode */ 71 72 uint32_t SJW; /*!< Specifies the maximum number of time quanta 73 the CAN hardware is allowed to lengthen or 74 shorten a bit to perform resynchronization. 75 This parameter can be a value of @ref CAN_synchronisation_jump_width */ 76 77 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1. 78 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ 79 80 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2. 81 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ 82 83 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode. 84 This parameter can be set to ENABLE or DISABLE. */ 85 86 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management. 87 This parameter can be set to ENABLE or DISABLE */ 88 89 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode. 90 This parameter can be set to ENABLE or DISABLE */ 91 92 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode. 93 This parameter can be set to ENABLE or DISABLE */ 94 95 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode. 96 This parameter can be set to ENABLE or DISABLE */ 97 98 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority. 99 This parameter can be set to ENABLE or DISABLE */ 100 }CAN_InitTypeDef; 101 102 /** 103 * @brief CAN filter configuration structure definition 104 */ 105 typedef struct 106 { 107 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 108 configuration, first one for a 16-bit configuration). 109 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 110 111 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 112 configuration, second one for a 16-bit configuration). 113 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 114 115 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 116 according to the mode (MSBs for a 32-bit configuration, 117 first one for a 16-bit configuration). 118 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 119 120 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 121 according to the mode (LSBs for a 32-bit configuration, 122 second one for a 16-bit configuration). 123 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 124 125 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. 126 This parameter can be a value of @ref CAN_filter_FIFO */ 127 128 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 129 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */ 130 131 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 132 This parameter can be a value of @ref CAN_filter_mode */ 133 134 uint32_t FilterScale; /*!< Specifies the filter scale. 135 This parameter can be a value of @ref CAN_filter_scale */ 136 137 uint32_t FilterActivation; /*!< Enable or disable the filter. 138 This parameter can be set to ENABLE or DISABLE */ 139 140 uint32_t BankNumber; /*!< Select the start slave bank filter. 141 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */ 142 143 }CAN_FilterConfTypeDef; 144 145 /** 146 * @brief CAN Tx message structure definition 147 */ 148 typedef struct 149 { 150 uint32_t StdId; /*!< Specifies the standard identifier. 151 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ 152 153 uint32_t ExtId; /*!< Specifies the extended identifier. 154 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ 155 156 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 157 This parameter can be a value of @ref CAN_identifier_type */ 158 159 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 160 This parameter can be a value of @ref CAN_remote_transmission_request */ 161 162 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 163 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ 164 165 uint8_t Data[8]; /*!< Contains the data to be transmitted. 166 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ 167 168 }CanTxMsgTypeDef; 169 170 /** 171 * @brief CAN Rx message structure definition 172 */ 173 typedef struct 174 { 175 uint32_t StdId; /*!< Specifies the standard identifier. 176 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ 177 178 uint32_t ExtId; /*!< Specifies the extended identifier. 179 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ 180 181 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received. 182 This parameter can be a value of @ref CAN_identifier_type */ 183 184 uint32_t RTR; /*!< Specifies the type of frame for the received message. 185 This parameter can be a value of @ref CAN_remote_transmission_request */ 186 187 uint32_t DLC; /*!< Specifies the length of the frame that will be received. 188 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ 189 190 uint8_t Data[8]; /*!< Contains the data to be received. 191 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ 192 193 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through. 194 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ 195 196 uint32_t FIFONumber; /*!< Specifies the receive FIFO number. 197 This parameter can be CAN_FIFO0 or CAN_FIFO1 */ 198 199 }CanRxMsgTypeDef; 200 201 /** 202 * @brief CAN handle Structure definition 203 */ 204 typedef struct 205 { 206 CAN_TypeDef *Instance; /*!< Register base address */ 207 208 CAN_InitTypeDef Init; /*!< CAN required parameters */ 209 210 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */ 211 212 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */ 213 214 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ 215 216 HAL_LockTypeDef Lock; /*!< CAN locking object */ 217 218 __IO uint32_t ErrorCode; /*!< CAN Error code */ 219 220 }CAN_HandleTypeDef; 221 222 /** 223 * @} 224 */ 225 226 /* Exported constants --------------------------------------------------------*/ 227 /** @defgroup CAN_Exported_Constants CAN Exported Constants 228 * @{ 229 */ 230 231 /** @defgroup CAN_Error_Code CAN Error Code 232 * @{ 233 */ 234 #define HAL_CAN_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 235 #define HAL_CAN_ERROR_EWG ((uint32_t)0x00000001) /*!< EWG error */ 236 #define HAL_CAN_ERROR_EPV ((uint32_t)0x00000002) /*!< EPV error */ 237 #define HAL_CAN_ERROR_BOF ((uint32_t)0x00000004) /*!< BOF error */ 238 #define HAL_CAN_ERROR_STF ((uint32_t)0x00000008) /*!< Stuff error */ 239 #define HAL_CAN_ERROR_FOR ((uint32_t)0x00000010) /*!< Form error */ 240 #define HAL_CAN_ERROR_ACK ((uint32_t)0x00000020) /*!< Acknowledgment error */ 241 #define HAL_CAN_ERROR_BR ((uint32_t)0x00000040) /*!< Bit recessive */ 242 #define HAL_CAN_ERROR_BD ((uint32_t)0x00000080) /*!< LEC dominant */ 243 #define HAL_CAN_ERROR_CRC ((uint32_t)0x00000100) /*!< LEC transfer error */ 244 #define HAL_CAN_ERROR_FOV0 ((uint32_t)0x00000200) /*!< FIFO0 overrun error */ 245 #define HAL_CAN_ERROR_FOV1 ((uint32_t)0x00000400) /*!< FIFO1 overrun error */ 246 /** 247 * @} 248 */ 249 250 /** @defgroup CAN_InitStatus CAN initialization Status 251 * @{ 252 */ 253 #define CAN_INITSTATUS_FAILED ((uint32_t)0x00000000) /*!< CAN initialization failed */ 254 #define CAN_INITSTATUS_SUCCESS ((uint32_t)0x00000001) /*!< CAN initialization OK */ 255 /** 256 * @} 257 */ 258 259 /** @defgroup CAN_operating_mode CAN Operating Mode 260 * @{ 261 */ 262 #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ 263 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ 264 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ 265 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ 266 /** 267 * @} 268 */ 269 270 271 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width 272 * @{ 273 */ 274 #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ 275 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ 276 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ 277 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ 278 /** 279 * @} 280 */ 281 282 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 283 * @{ 284 */ 285 #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ 286 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ 287 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ 288 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ 289 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ 290 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ 291 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ 292 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ 293 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ 294 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ 295 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ 296 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ 297 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ 298 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ 299 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ 300 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ 301 /** 302 * @} 303 */ 304 305 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 306 * @{ 307 */ 308 #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ 309 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ 310 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ 311 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ 312 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ 313 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ 314 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ 315 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ 316 /** 317 * @} 318 */ 319 320 /** @defgroup CAN_filter_mode CAN Filter Mode 321 * @{ 322 */ 323 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */ 324 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */ 325 /** 326 * @} 327 */ 328 329 /** @defgroup CAN_filter_scale CAN Filter Scale 330 * @{ 331 */ 332 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */ 333 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */ 334 /** 335 * @} 336 */ 337 338 /** @defgroup CAN_filter_FIFO CAN Filter FIFO 339 * @{ 340 */ 341 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ 342 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ 343 /** 344 * @} 345 */ 346 347 /** @defgroup CAN_identifier_type CAN Identifier Type 348 * @{ 349 */ 350 #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */ 351 #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */ 352 /** 353 * @} 354 */ 355 356 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request 357 * @{ 358 */ 359 #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */ 360 #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */ 361 /** 362 * @} 363 */ 364 365 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number 366 * @{ 367 */ 368 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ 369 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ 370 /** 371 * @} 372 */ 373 374 /** @defgroup CAN_flags CAN Flags 375 * @{ 376 */ 377 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() 378 and CAN_ClearFlag() functions. */ 379 /* If the flag is 0x1XXXXXXX, it means that it can only be used with 380 CAN_GetFlagStatus() function. */ 381 382 /* Transmit Flags */ 383 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */ 384 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */ 385 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */ 386 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */ 387 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */ 388 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */ 389 #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */ 390 #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */ 391 #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */ 392 393 /* Receive Flags */ 394 #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */ 395 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */ 396 397 #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */ 398 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */ 399 400 /* Operating Mode Flags */ 401 #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */ 402 #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */ 403 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */ 404 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible. 405 In this case the SLAK bit can be polled.*/ 406 407 /* Error Flags */ 408 #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */ 409 #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */ 410 #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */ 411 /** 412 * @} 413 */ 414 415 /** @defgroup CAN_interrupts CAN Interrupts 416 * @{ 417 */ 418 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ 419 420 /* Receive Interrupts */ 421 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ 422 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ 423 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ 424 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ 425 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ 426 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ 427 428 /* Operating Mode Interrupts */ 429 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ 430 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ 431 432 /* Error Interrupts */ 433 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ 434 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ 435 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ 436 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ 437 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ 438 439 /** 440 * @} 441 */ 442 443 /* Mailboxes definition */ 444 #define CAN_TXMAILBOX_0 ((uint8_t)0x00) 445 #define CAN_TXMAILBOX_1 ((uint8_t)0x01) 446 #define CAN_TXMAILBOX_2 ((uint8_t)0x02) 447 448 /** 449 * @} 450 */ 451 452 /* Exported macros -----------------------------------------------------------*/ 453 /** @defgroup CAN_Exported_Macro CAN Exported Macros 454 * @{ 455 */ 456 457 /** @brief Reset CAN handle state. 458 * @param __HANDLE__: CAN handle. 459 * @retval None 460 */ 461 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) 462 463 /** 464 * @brief Enable the specified CAN interrupt. 465 * @param __HANDLE__: CAN handle. 466 * @param __INTERRUPT__: CAN Interrupt. 467 * @retval None 468 */ 469 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) 470 471 /** 472 * @brief Disable the specified CAN interrupt. 473 * @param __HANDLE__: CAN handle. 474 * @param __INTERRUPT__: CAN Interrupt. 475 * @retval None 476 */ 477 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) 478 479 /** 480 * @brief Return the number of pending received messages. 481 * @param __HANDLE__: CAN handle. 482 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 483 * @retval The number of pending message. 484 */ 485 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 486 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03))) 487 488 /** @brief Check whether the specified CAN flag is set or not. 489 * @param __HANDLE__: specifies the CAN Handle. 490 * @param __FLAG__: specifies the flag to check. 491 * This parameter can be one of the following values: 492 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag 493 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag 494 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag 495 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag 496 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag 497 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag 498 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag 499 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag 500 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag 501 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 502 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 503 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 504 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 505 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 506 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 507 * @arg CAN_FLAG_WKU: Wake up Flag 508 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag 509 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag 510 * @arg CAN_FLAG_EWG: Error Warning Flag 511 * @arg CAN_FLAG_EPV: Error Passive Flag 512 * @arg CAN_FLAG_BOF: Bus-Off Flag 513 * @retval The new state of __FLAG__ (TRUE or FALSE). 514 */ 515 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ 516 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 517 (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 518 (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 519 (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 520 ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK)))) 521 522 /** @brief Clear the specified CAN pending flag. 523 * @param __HANDLE__: specifies the CAN Handle. 524 * @param __FLAG__: specifies the flag to check. 525 * This parameter can be one of the following values: 526 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag 527 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag 528 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag 529 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag 530 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag 531 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag 532 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag 533 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag 534 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag 535 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 536 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 537 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 538 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 539 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 540 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 541 * @arg CAN_FLAG_WKU: Wake up Flag 542 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag 543 * @retval The new state of __FLAG__ (TRUE or FALSE). 544 */ 545 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 546 ((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 547 (((__FLAG__) >> 8U) == 2)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 548 (((__FLAG__) >> 8U) == 4)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 549 (((__FLAG__) >> 8U) == 1)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0) 550 551 552 /** @brief Check whether the specified CAN interrupt source is enabled or not. 553 * @param __HANDLE__: specifies the CAN Handle. 554 * @param __INTERRUPT__: specifies the CAN interrupt source to check. 555 * This parameter can be one of the following values: 556 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable 557 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable 558 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable 559 * @retval The new state of __IT__ (TRUE or FALSE). 560 */ 561 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 562 563 /** 564 * @brief Check the transmission status of a CAN Frame. 565 * @param __HANDLE__: specifies the CAN Handle. 566 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. 567 * @retval The new status of transmission (TRUE or FALSE). 568 */ 569 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\ 570 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\ 571 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\ 572 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2))) 573 574 575 576 /** 577 * @brief Release the specified receive FIFO. 578 * @param __HANDLE__: CAN handle. 579 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 580 * @retval None 581 */ 582 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 583 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1)) 584 585 /** 586 * @brief Cancel a transmit request. 587 * @param __HANDLE__: specifies the CAN Handle. 588 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. 589 * @retval None 590 */ 591 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\ 592 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\ 593 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\ 594 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2)) 595 596 /** 597 * @brief Enable or disable the DBG Freeze for CAN. 598 * @param __HANDLE__: specifies the CAN Handle. 599 * @param __NEWSTATE__: new state of the CAN peripheral. 600 * This parameter can be: ENABLE (CAN reception/transmission is frozen 601 * during debug. Reception FIFO can still be accessed/controlled normally) 602 * or DISABLE (CAN is working during debug). 603 * @retval None 604 */ 605 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \ 606 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF)) 607 608 /** 609 * @} 610 */ 611 612 /* Exported functions --------------------------------------------------------*/ 613 /** @addtogroup CAN_Exported_Functions CAN Exported Functions 614 * @{ 615 */ 616 617 /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 618 * @brief Initialization and Configuration functions 619 * @{ 620 */ 621 /* addtogroup and de-initialization functions *****************************/ 622 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan); 623 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig); 624 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan); 625 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan); 626 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan); 627 /** 628 * @} 629 */ 630 631 /** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions 632 * @brief I/O operation functions 633 * @{ 634 */ 635 /* IO operation functions *****************************************************/ 636 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout); 637 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan); 638 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout); 639 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber); 640 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan); 641 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); 642 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan); 643 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan); 644 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan); 645 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); 646 /** 647 * @} 648 */ 649 650 /** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions 651 * @brief CAN Peripheral State functions 652 * @{ 653 */ 654 /* Peripheral State and Error functions ***************************************/ 655 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); 656 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan); 657 /** 658 * @} 659 */ 660 661 /** 662 * @} 663 */ 664 665 /* Private types -------------------------------------------------------------*/ 666 /* Private constants ---------------------------------------------------------*/ 667 /** @defgroup CAN_Private_Constants CAN Private Constants 668 * @{ 669 */ 670 /** @defgroup CAN_transmit_constants CAN Transmit Constants 671 * @{ 672 */ 673 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */ 674 /** 675 * @} 676 */ 677 #define CAN_FLAG_MASK ((uint32_t)0x000000FF) 678 679 680 /** 681 * @} 682 */ 683 684 /* Private macros ------------------------------------------------------------*/ 685 /** @defgroup CAN_Private_Macros CAN Private Macros 686 * @{ 687 */ 688 689 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ 690 ((MODE) == CAN_MODE_LOOPBACK)|| \ 691 ((MODE) == CAN_MODE_SILENT) || \ 692 ((MODE) == CAN_MODE_SILENT_LOOPBACK)) 693 694 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \ 695 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) 696 697 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ) 698 699 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ) 700 701 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) 702 703 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) 704 705 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ 706 ((MODE) == CAN_FILTERMODE_IDLIST)) 707 708 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ 709 ((SCALE) == CAN_FILTERSCALE_32BIT)) 710 711 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ 712 ((FIFO) == CAN_FILTER_FIFO1)) 713 714 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28) 715 716 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) 717 718 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) 719 720 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) 721 722 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) 723 724 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ 725 ((IDTYPE) == CAN_ID_EXT)) 726 727 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) 728 729 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) 730 731 /** 732 * @} 733 */ 734 735 /* Private functions ---------------------------------------------------------*/ 736 737 /** 738 * @} 739 */ 740 741 /** 742 * @} 743 */ 744 #endif /* CAN1 */ 745 746 #ifdef __cplusplus 747 } 748 #endif 749 750 #endif /* __STM32L4xx_HAL_CAN_LEGACY_H */ 751 752 753 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 754