1 /**
2 ******************************************************************************
3 * @file stm32wbxx_hal.c
4 * @author MCD Application Team
5 * @brief HAL module driver.
6 * This is the common part of the HAL initialization
7 *
8 @verbatim
9 ==============================================================================
10 ##### How to use this driver #####
11 ==============================================================================
12 [..]
13 The common HAL driver contains a set of generic and common APIs that can be
14 used by the PPP peripheral drivers and the user to start using the HAL.
15 [..]
16 The HAL contains two APIs' categories:
17 (+) Common HAL APIs
18 (+) Services HAL APIs
19
20 @endverbatim
21 ******************************************************************************
22 * @attention
23 *
24 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
25 * All rights reserved.</center></h2>
26 *
27 * This software component is licensed by ST under BSD 3-Clause license,
28 * the "License"; You may not use this file except in compliance with the
29 * License. You may obtain a copy of the License at:
30 * opensource.org/licenses/BSD-3-Clause
31 *
32 ******************************************************************************
33 */
34
35 /* Includes ------------------------------------------------------------------*/
36 #include "stm32wbxx_hal.h"
37
38 /** @addtogroup STM32WBxx_HAL_Driver
39 * @{
40 */
41
42 /** @addtogroup HAL
43 * @brief HAL module driver
44 * @{
45 */
46
47 #ifdef HAL_MODULE_ENABLED
48
49 /* Private typedef -----------------------------------------------------------*/
50 /* Private define ------------------------------------------------------------*/
51
52 /** @defgroup HAL_Private_Constants HAL Private Constants
53 * @{
54 */
55 /**
56 * @brief STM32WBxx HAL Driver version number
57 */
58 #define __STM32WBxx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
59 #define __STM32WBxx_HAL_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */
60 #define __STM32WBxx_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
61 #define __STM32WBxx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
62 #define __STM32WBxx_HAL_VERSION ((__STM32WBxx_HAL_VERSION_MAIN << 24U)\
63 |(__STM32WBxx_HAL_VERSION_SUB1 << 16U)\
64 |(__STM32WBxx_HAL_VERSION_SUB2 << 8U )\
65 |(__STM32WBxx_HAL_VERSION_RC))
66
67 #if defined(VREFBUF)
68 #define VREFBUF_TIMEOUT_VALUE 10U /* 10 ms */
69 #endif
70
71 /**
72 * @}
73 */
74
75 /* Private macro -------------------------------------------------------------*/
76 /* Exported variables ---------------------------------------------------------*/
77 /** @defgroup HAL_Exported_Variables HAL Exported Variables
78 * @{
79 */
80 __IO uint32_t uwTick;
81 uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
82 uint32_t uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
83 /**
84 * @}
85 */
86
87 /* Private function prototypes -----------------------------------------------*/
88 /* Exported functions --------------------------------------------------------*/
89
90 /** @addtogroup HAL_Exported_Functions
91 * @{
92 */
93
94 /** @addtogroup HAL_Exported_Functions_Group1
95 * @brief HAL Initialization and Configuration functions
96 *
97 @verbatim
98 ===============================================================================
99 ##### HAL Initialization and Configuration functions #####
100 ===============================================================================
101 [..] This section provides functions allowing to:
102 (+) Initialize the Flash interface the NVIC allocation and initial time base
103 clock configuration.
104 (+) De-initialize common part of the HAL.
105 (+) Configure the time base source to have 1ms time base with a dedicated
106 Tick interrupt priority.
107 (++) SysTick timer is used by default as source of time base, but user
108 can eventually implement his proper time base source (a general purpose
109 timer for example or other time source), keeping in mind that Time base
110 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
111 handled in milliseconds basis.
112 (++) Time base configuration function (HAL_InitTick ()) is called automatically
113 at the beginning of the program after reset by HAL_Init() or at any time
114 when clock is configured, by HAL_RCC_ClockConfig().
115 (++) Source of time base is configured to generate interrupts at regular
116 time intervals. Care must be taken if HAL_Delay() is called from a
117 peripheral ISR process, the Tick interrupt line must have higher priority
118 (numerically lower) than the peripheral interrupt. Otherwise the caller
119 ISR process will be blocked.
120 (++) functions affecting time base configurations are declared as __weak
121 to make override possible in case of other implementations in user file.
122 @endverbatim
123 * @{
124 */
125
126 /**
127 * @brief This function is used to initialize the HAL Library; it must be the first
128 * instruction to be executed in the main program (before to call any other
129 * HAL function), it performs the following:
130 * Configure the Flash prefetch, instruction and Data caches.
131 * Configures the SysTick to generate an interrupt each 1 millisecond,
132 * which is clocked by the MSI (at this stage, the clock is not yet
133 * configured and thus the system is running from the internal MSI at 4 MHz).
134 * Set NVIC Group Priority to 4.
135 * Calls the HAL_MspInit() callback function defined in user file
136 * "stm32wbxx_hal_msp.c" to do the global low level hardware initialization
137 *
138 * @note SysTick is used as time base for the HAL_Delay() function, the application
139 * need to ensure that the SysTick time base is always set to 1 millisecond
140 * to have correct HAL operation.
141 * @retval HAL status
142 */
HAL_Init(void)143 HAL_StatusTypeDef HAL_Init(void)
144 {
145 HAL_StatusTypeDef status = HAL_OK;
146 /* Configure Flash prefetch, Instruction cache, Data cache */
147 /* Default configuration at reset is: */
148 /* - Prefetch disabled */
149 /* - Instruction cache enabled */
150 /* - Data cache enabled */
151 #if (INSTRUCTION_CACHE_ENABLE == 0U)
152 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
153 #endif /* INSTRUCTION_CACHE_ENABLE */
154
155 #if (DATA_CACHE_ENABLE == 0U)
156 __HAL_FLASH_DATA_CACHE_DISABLE();
157 #endif /* DATA_CACHE_ENABLE */
158
159 #if (PREFETCH_ENABLE != 0U)
160 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
161 #endif /* PREFETCH_ENABLE */
162
163 /* Set Interrupt Group Priority */
164 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
165
166 /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
167 if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
168 {
169 status = HAL_ERROR;
170 }
171 else
172 {
173 /* Init the low level hardware */
174 HAL_MspInit();
175 }
176
177 /* Return function status */
178 return status;
179 }
180
181 /**
182 * @brief This function de-Initializes common part of the HAL and stops the source of time base.
183 * @note This function is optional.
184 * @retval HAL status
185 */
HAL_DeInit(void)186 HAL_StatusTypeDef HAL_DeInit(void)
187 {
188 /* Reset of all peripherals */
189 __HAL_RCC_APB1_FORCE_RESET();
190 __HAL_RCC_APB1_RELEASE_RESET();
191
192 __HAL_RCC_APB2_FORCE_RESET();
193 __HAL_RCC_APB2_RELEASE_RESET();
194
195 __HAL_RCC_APB3_FORCE_RESET();
196 __HAL_RCC_APB3_RELEASE_RESET();
197
198 __HAL_RCC_AHB1_FORCE_RESET();
199 __HAL_RCC_AHB1_RELEASE_RESET();
200
201 __HAL_RCC_AHB2_FORCE_RESET();
202 __HAL_RCC_AHB2_RELEASE_RESET();
203
204 __HAL_RCC_AHB3_FORCE_RESET();
205 __HAL_RCC_AHB3_RELEASE_RESET();
206
207 /* De-Init the low level hardware */
208 HAL_MspDeInit();
209
210 /* Return function status */
211 return HAL_OK;
212 }
213
214 /**
215 * @brief Initialize the MSP.
216 * @retval None
217 */
HAL_MspInit(void)218 __weak void HAL_MspInit(void)
219 {
220 /* NOTE : This function should not be modified, when the callback is needed,
221 the HAL_MspInit could be implemented in the user file
222 */
223 }
224
225 /**
226 * @brief DeInitializes the MSP.
227 * @retval None
228 */
HAL_MspDeInit(void)229 __weak void HAL_MspDeInit(void)
230 {
231 /* NOTE : This function should not be modified, when the callback is needed,
232 the HAL_MspDeInit could be implemented in the user file
233 */
234 }
235
236 /**
237 * @brief This function configures the source of the time base:
238 * The time source is configured to have 1ms time base with a dedicated
239 * Tick interrupt priority.
240 * @note This function is called automatically at the beginning of program after
241 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
242 * @note In the default implementation, SysTick timer is the source of time base.
243 * It is used to generate interrupts at regular time intervals.
244 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
245 * The SysTick interrupt must have higher priority (numerically lower)
246 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
247 * The function is declared as __weak to be overwritten in case of other
248 * implementation in user file.
249 * @param TickPriority Tick interrupt priority.
250 * @retval HAL status
251 */
HAL_InitTick(uint32_t TickPriority)252 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
253 {
254 HAL_StatusTypeDef status = HAL_OK;
255
256 if (uwTickFreq != 0U)
257 {
258 /*Configure the SysTick to have interrupt in 1ms time basis*/
259 if (HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/ (1000U /uwTickFreq)) == 0U)
260 {
261 /* Configure the SysTick IRQ priority */
262 if (TickPriority < (1UL << __NVIC_PRIO_BITS))
263 {
264 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
265 uwTickPrio = TickPriority;
266 }
267 else
268 {
269 status = HAL_ERROR;
270 }
271 }
272 else
273 {
274 status = HAL_ERROR;
275 }
276 }
277 else
278 {
279 status = HAL_ERROR;
280 }
281
282 /* Return function status */
283 return status;
284 }
285
286 /**
287 * @}
288 */
289
290 /** @addtogroup HAL_Exported_Functions_Group2
291 * @brief HAL Control functions
292 *
293 @verbatim
294 ===============================================================================
295 ##### HAL Control functions #####
296 ===============================================================================
297 [..] This section provides functions allowing to:
298 (+) Provide a tick value in millisecond
299 (+) Provide a blocking delay in millisecond
300 (+) Suspend the time base source interrupt
301 (+) Resume the time base source interrupt
302 (+) Get the HAL API driver version
303 (+) Get the device revision identifier
304 (+) Get the device identifier
305 (+) Get the unique device identifier
306
307 @endverbatim
308 * @{
309 */
310
311 /**
312 * @brief This function is called to increment a global variable "uwTick"
313 * used as application time base.
314 * @note In the default implementation, this variable is incremented each 1ms
315 * in SysTick ISR.
316 * @note This function is declared as __weak to be overwritten in case of other
317 * implementations in user file.
318 * @retval None
319 */
HAL_IncTick(void)320 __weak void HAL_IncTick(void)
321 {
322 uwTick += (uint32_t)uwTickFreq;
323 }
324
325 /**
326 * @brief Provides a tick value in millisecond.
327 * @note This function is declared as __weak to be overwritten in case of other
328 * implementations in user file.
329 * @retval tick value
330 */
HAL_GetTick(void)331 __weak uint32_t HAL_GetTick(void)
332 {
333 return uwTick;
334 }
335
336 /**
337 * @brief This function returns a tick priority.
338 * @retval tick priority
339 */
HAL_GetTickPrio(void)340 uint32_t HAL_GetTickPrio(void)
341 {
342 return uwTickPrio;
343 }
344
345 /**
346 * @brief Set new tick Freq.
347 * @retval Status
348 */
HAL_SetTickFreq(uint32_t Freq)349 HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq)
350 {
351 HAL_StatusTypeDef status = HAL_OK;
352 assert_param(IS_TICKFREQ(Freq));
353
354 if (uwTickFreq != Freq)
355 {
356 uwTickFreq = Freq;
357
358 /* Apply the new tick Freq */
359 status = HAL_InitTick(uwTickPrio);
360 }
361
362 return status;
363 }
364
365 /**
366 * @brief Return tick frequency.
367 * @retval tick period in Hz
368 */
HAL_GetTickFreq(void)369 uint32_t HAL_GetTickFreq(void)
370 {
371 return uwTickFreq;
372 }
373
374 /**
375 * @brief This function provides minimum delay (in milliseconds) based
376 * on variable incremented.
377 * @note In the default implementation , SysTick timer is the source of time base.
378 * It is used to generate interrupts at regular time intervals where uwTick
379 * is incremented.
380 * @note This function is declared as __weak to be overwritten in case of other
381 * implementations in user file.
382 * @param Delay specifies the delay time length, in milliseconds.
383 * @retval None
384 */
HAL_Delay(uint32_t Delay)385 __weak void HAL_Delay(uint32_t Delay)
386 {
387 uint32_t tickstart = HAL_GetTick();
388 uint32_t wait = Delay;
389
390 /* Add a freq to guarantee minimum wait */
391 if (wait < HAL_MAX_DELAY)
392 {
393 wait += (uint32_t)(uwTickFreq);
394 }
395
396 while ((HAL_GetTick() - tickstart) < wait)
397 {
398 }
399 }
400
401
402 /**
403 * @brief Suspend Tick increment.
404 * @note In the default implementation , SysTick timer is the source of time base. It is
405 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
406 * is called, the SysTick interrupt will be disabled and so Tick increment
407 * is suspended.
408 * @note This function is declared as __weak to be overwritten in case of other
409 * implementations in user file.
410 * @retval None
411 */
HAL_SuspendTick(void)412 __weak void HAL_SuspendTick(void)
413 {
414 /* Disable SysTick Interrupt */
415 CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk);
416 }
417
418 /**
419 * @brief Resume Tick increment.
420 * @note In the default implementation , SysTick timer is the source of time base. It is
421 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
422 * is called, the SysTick interrupt will be enabled and so Tick increment
423 * is resumed.
424 * @note This function is declared as __weak to be overwritten in case of other
425 * implementations in user file.
426 * @retval None
427 */
HAL_ResumeTick(void)428 __weak void HAL_ResumeTick(void)
429 {
430 /* Enable SysTick Interrupt */
431 SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk);
432 }
433
434 /**
435 * @brief Returns the HAL revision
436 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
437 */
HAL_GetHalVersion(void)438 uint32_t HAL_GetHalVersion(void)
439 {
440 return __STM32WBxx_HAL_VERSION;
441 }
442
443 /**
444 * @brief Returns the device revision identifier.
445 * @retval Device revision identifier
446 */
HAL_GetREVID(void)447 uint32_t HAL_GetREVID(void)
448 {
449 return(LL_DBGMCU_GetRevisionID());
450 }
451
452 /**
453 * @brief Returns the device identifier.
454 * @retval Device identifier
455 */
HAL_GetDEVID(void)456 uint32_t HAL_GetDEVID(void)
457 {
458 return(LL_DBGMCU_GetDeviceID());
459 }
460
461 /**
462 * @brief Return the first word of the unique device identifier (UID based on 96 bits)
463 * @retval Device identifier
464 */
HAL_GetUIDw0(void)465 uint32_t HAL_GetUIDw0(void)
466 {
467 return(READ_REG(*((uint32_t *)UID_BASE)));
468 }
469
470 /**
471 * @brief Return the second word of the unique device identifier (UID based on 96 bits)
472 * @retval Device identifier
473 */
HAL_GetUIDw1(void)474 uint32_t HAL_GetUIDw1(void)
475 {
476 return(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
477 }
478
479 /**
480 * @brief Return the third word of the unique device identifier (UID based on 96 bits)
481 * @retval Device identifier
482 */
HAL_GetUIDw2(void)483 uint32_t HAL_GetUIDw2(void)
484 {
485 return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
486 }
487
488 /**
489 * @}
490 */
491
492 /** @addtogroup HAL_Exported_Functions_Group3
493 * @brief HAL Debug functions
494 *
495 @verbatim
496 ===============================================================================
497 ##### HAL Debug functions #####
498 ===============================================================================
499 [..] This section provides functions allowing to:
500 (+) Enable/Disable Debug module during SLEEP mode
501 (+) Enable/Disable Debug module during STOP mode
502 (+) Enable/Disable Debug module during STANDBY mode
503
504 @endverbatim
505 * @{
506 */
507
508 /**
509 * @brief Enable the Debug Module during SLEEP mode
510 * @retval None
511 */
HAL_DBGMCU_EnableDBGSleepMode(void)512 void HAL_DBGMCU_EnableDBGSleepMode(void)
513 {
514 LL_DBGMCU_EnableDBGSleepMode();
515 }
516
517 /**
518 * @brief Disable the Debug Module during SLEEP mode
519 * @retval None
520 */
HAL_DBGMCU_DisableDBGSleepMode(void)521 void HAL_DBGMCU_DisableDBGSleepMode(void)
522 {
523 LL_DBGMCU_DisableDBGSleepMode();
524 }
525
526 /**
527 * @brief Enable the Debug Module during STOP mode
528 * @retval None
529 */
HAL_DBGMCU_EnableDBGStopMode(void)530 void HAL_DBGMCU_EnableDBGStopMode(void)
531 {
532 LL_DBGMCU_EnableDBGStopMode();
533 }
534
535 /**
536 * @brief Disable the Debug Module during STOP mode
537 * @retval None
538 */
HAL_DBGMCU_DisableDBGStopMode(void)539 void HAL_DBGMCU_DisableDBGStopMode(void)
540 {
541 LL_DBGMCU_DisableDBGStopMode();
542 }
543
544 /**
545 * @brief Enable the Debug Module during STANDBY mode
546 * @retval None
547 */
HAL_DBGMCU_EnableDBGStandbyMode(void)548 void HAL_DBGMCU_EnableDBGStandbyMode(void)
549 {
550 LL_DBGMCU_EnableDBGStandbyMode();
551 }
552
553 /**
554 * @brief Disable the Debug Module during STANDBY mode
555 * @retval None
556 */
HAL_DBGMCU_DisableDBGStandbyMode(void)557 void HAL_DBGMCU_DisableDBGStandbyMode(void)
558 {
559 LL_DBGMCU_DisableDBGStandbyMode();
560 }
561
562 /**
563 * @}
564 */
565
566 /** @defgroup HAL_Exported_Functions_Group4 HAL System Configuration functions
567 * @brief HAL System Configuration functions
568 *
569 @verbatim
570 ===============================================================================
571 ##### HAL system configuration functions #####
572 ===============================================================================
573 [..] This section provides functions allowing to:
574 (+) Start a hardware SRAM2 erase operation
575 (+) Disable CPU2 SRAM fetch (execution)
576 (+) Configure the Voltage reference buffer
577 (+) Enable/Disable the Voltage reference buffer
578 (+) Enable/Disable the I/O analog switch voltage booster
579 (+) Enable/Disable the access for security IP (AES1, AES2, PKA, RNG)
580 (+) Enable/Disable the access for security IP (AES2, PKA, RNG)
581
582 @endverbatim
583 * @{
584 */
585
586 /**
587 * @brief Start a hardware SRAM2 erase operation.
588 * @note As long as SRAM2 is not erased the SRAM2ER bit will be set.
589 * This bit is automatically reset at the end of the SRAM2 erase operation.
590 * @retval None
591 */
HAL_SYSCFG_SRAM2Erase(void)592 void HAL_SYSCFG_SRAM2Erase(void)
593 {
594 /* unlock the write protection of the SRAM2ER bit */
595 __HAL_SYSCFG_SRAM2_WRP_UNLOCK();
596 /* Starts a hardware SRAM2 erase operation*/
597 __HAL_SYSCFG_SRAM2_ERASE();
598 }
599
600 /**
601 * @brief Disable CPU2 SRAM fetch (execution) (This bit can be set by Firmware
602 * and will only be reset by a Hardware reset, including a reset after Standby.)
603 * @note Firmware writing 0 has no effect.
604 * @retval None
605 */
HAL_SYSCFG_DisableSRAMFetch(void)606 void HAL_SYSCFG_DisableSRAMFetch(void)
607 {
608 LL_SYSCFG_DisableSRAMFetch();
609 }
610
611 /**
612 * @brief Check if CPU2 SRAM fetch is enabled
613 * @retval State of bit (1 or 0).
614 */
HAL_SYSCFG_IsEnabledSRAMFetch(void)615 uint32_t HAL_SYSCFG_IsEnabledSRAMFetch(void)
616 {
617 return (LL_SYSCFG_IsEnabledSRAMFetch());
618 }
619
620 #if defined(VREFBUF)
621 /**
622 * @brief Configure the internal voltage reference buffer voltage scale.
623 * @param VoltageScaling specifies the output voltage to achieve
624 * This parameter can be one of the following values:
625 * @arg @ref SYSCFG_VREFBUF_VOLTAGE_SCALE0 : VREF_OUT1 around 2.048 V.
626 * This requires VDDA equal to or higher than 2.4 V.
627 * @arg @ref SYSCFG_VREFBUF_VOLTAGE_SCALE1 : VREF_OUT1 around 2.5 V.
628 * This requires VDDA equal to or higher than 2.8 V.
629 * @retval None
630 */
HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)631 void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
632 {
633 /* Check the parameters */
634 assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
635
636 LL_VREFBUF_SetVoltageScaling(VoltageScaling);
637 }
638
639 /**
640 * @brief Configure the internal voltage reference buffer high impedance mode.
641 * @param Mode specifies the high impedance mode
642 * This parameter can be one of the following values:
643 * @arg @ref SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE : VREF+ pin is internally connect to VREFINT output.
644 * @arg @ref SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE : VREF+ pin is high impedance.
645 * @retval HAL_OK/HAL_TIMEOUT
646 */
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)647 void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
648 {
649
650 /* Check the parameters */
651 assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
652
653 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
654 }
655
656 /**
657 * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
658 * @param TrimmingValue specifies trimming code for VREFBUF calibration
659 * This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x3F
660 * @retval None
661 */
HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)662 void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
663 {
664 /* Check the parameters */
665 assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
666
667 LL_VREFBUF_SetTrimming(TrimmingValue);
668
669 }
670
671 /**
672 * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
673 * @retval HAL_OK/HAL_TIMEOUT
674 */
HAL_SYSCFG_EnableVREFBUF(void)675 HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
676 {
677 uint32_t tickstart;
678
679 LL_VREFBUF_Enable();
680
681 /* Get Start Tick*/
682 tickstart = HAL_GetTick();
683
684 /* Wait for VRR bit */
685 while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == 0U)
686 {
687 if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
688 {
689 return HAL_TIMEOUT;
690 }
691 }
692
693 return HAL_OK;
694 }
695
696 /**
697 * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
698 *
699 * @retval None
700 */
HAL_SYSCFG_DisableVREFBUF(void)701 void HAL_SYSCFG_DisableVREFBUF(void)
702 {
703 LL_VREFBUF_Disable();
704 }
705 #endif /* VREFBUF */
706
707 /**
708 * @brief Enable the I/O analog switch voltage booster
709 *
710 * @retval None
711 */
HAL_SYSCFG_EnableIOBooster(void)712 void HAL_SYSCFG_EnableIOBooster(void)
713 {
714 LL_SYSCFG_EnableAnalogBooster();
715 }
716
717 /**
718 * @brief Disable the I/O analog switch voltage booster
719 *
720 * @retval None
721 */
HAL_SYSCFG_DisableIOBooster(void)722 void HAL_SYSCFG_DisableIOBooster(void)
723 {
724 LL_SYSCFG_DisableAnalogBooster();
725 }
726
727 /**
728 * @brief Enable the I/O analog switch supplied by VDD
729 * @note To be used when I/O analog switch voltage booster is not enabled
730 * @retval None
731 */
HAL_SYSCFG_EnableIOVdd(void)732 void HAL_SYSCFG_EnableIOVdd(void)
733 {
734 LL_SYSCFG_EnableAnalogGpioSwitch();
735 }
736
737 /**
738 * @brief Disable the I/O analog switch supplied by VDD
739 *
740 * @retval None
741 */
HAL_SYSCFG_DisableIOVdd(void)742 void HAL_SYSCFG_DisableIOVdd(void)
743 {
744 LL_SYSCFG_DisableAnalogGpioSwitch();
745 }
746
747 /**
748 * @brief Enable the access for security IP
749 * @note When the system is secure (ESE = 1), this register provides write access security and can
750 * only be written by the CPU2. A write access from the CPU1 will be ignored and a bus error
751 * is generated.
752 * @param SecurityAccess This parameter can be a combination of the following values:
753 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_AES1
754 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_AES2
755 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_PKA
756 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_RNG
757 * @retval None
758 */
HAL_SYSCFG_EnableSecurityAccess(uint32_t SecurityAccess)759 void HAL_SYSCFG_EnableSecurityAccess(uint32_t SecurityAccess)
760 {
761 /* Check the parameters */
762 assert_param(IS_SYSCFG_SECURITY_ACCESS(SecurityAccess));
763
764 LL_SYSCFG_EnableSecurityAccess(SecurityAccess);
765 }
766
767 /**
768 * @brief Disable the access for security IP
769 * @note When the system is secure (ESE = 1), this register provides write access security and can
770 * only be written by the CPU2. A write access from the CPU1 will be ignored and a bus error
771 * is generated.
772 * @param SecurityAccess This parameter can be a combination of the following values:
773 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_AES1
774 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_AES2
775 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_PKA
776 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_RNG
777 * @retval None
778 */
HAL_SYSCFG_DisableSecurityAccess(uint32_t SecurityAccess)779 void HAL_SYSCFG_DisableSecurityAccess(uint32_t SecurityAccess)
780 {
781 /* Check the parameters */
782 assert_param(IS_SYSCFG_SECURITY_ACCESS(SecurityAccess));
783
784 LL_SYSCFG_DisableSecurityAccess(SecurityAccess);
785 }
786
787 /**
788 * @brief Indicate if access for security IP is enabled
789 * @param SecurityAccess This parameter can be one of the following values:
790 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_AES1
791 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_AES2
792 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_PKA
793 * @arg @ref HAL_SYSCFG_SECURE_ACCESS_RNG
794 * @retval State of bit (1 or 0).
795 */
HAL_SYSCFG_IsEnabledSecurityAccess(uint32_t SecurityAccess)796 uint32_t HAL_SYSCFG_IsEnabledSecurityAccess(uint32_t SecurityAccess)
797 {
798 return (LL_SYSCFG_IsEnabledSecurityAccess(SecurityAccess));
799 }
800 /**
801 * @}
802 */
803
804 /**
805 * @}
806 */
807
808 #endif /* HAL_MODULE_ENABLED */
809 /**
810 * @}
811 */
812
813 /**
814 * @}
815 */
816
817 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
818