xref: /aosp_15_r20/external/coreboot/src/southbridge/intel/i82870/82870.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /* for io APIC 1461 */
4 #define MBAR		0x10
5 #define ABAR		0x40
6 
7 /* for pci bridge  1460 */
8 #define MTT		0x042
9 #define HCCR		0x0f0
10 #define ACNF		0x0e0
11 #define STRP		0x44		// Strap status register
12 
13 #define STRP_EN133	0x0001		// 133 MHz-capable (Px_133EN)
14 #define STRP_HPCAP	0x0002		// Hot-plug capable (Hx_SLOT zero/nonzero)
15 
16 #define ACNF_SYNCPH	0x0010		// PCI(-X) input clock is synchronous to hub input clock
17