xref: /aosp_15_r20/external/flashrom/doc/supported_hw/supported_prog/serprog/serprog-protocol.rst (revision 0d6140be3aa665ecc836e8907834fcd3e3b018fc)
1=====================================
2Serial Flasher Protocol Specification
3=====================================
4
5Version 1 (0x01 return value == 1)
6==================================
7
8Command And Answer Sequence - all commands give an answer.
9
10PC: COMMAND(8bit) <parameters determined by opcode>
11
12DEV: ACK/NAK(8bit) <OPTIONAL RETURN BYTES (only if ACK)> / nothing
13
14Command 0x10 (SYNCNOP) has a special return of NAK+ACK for synchronization.
15
16ACK = 0x06
17
18NAK = 0x15
19
20All multibyte values are little-endian. Addresses and lengths are 24-bit.
21
22======== =============================== ================================================== =================================================
23COMMAND 	Description			Parameters					   Return Value
24======== =============================== ================================================== =================================================
250x00	 NOP				 none						    ACK
260x01	 Query programmer iface version	 none						    ACK + 16bit version (nonzero)
270x02	 Query supported commands bitmap none						    ACK + 32 bytes (256 bits) of supported cmds flags
280x03	 Query programmer name		 none						    ACK + 16 bytes string (null padding) / NAK
290x04	 Query serial buffer size	 none						    ACK + 16bit size / NAK
300x05	 Query supported bustypes	 none						    ACK + 8-bit flags (as per flashrom) / NAK
310x06	 Query connected address lines	 none						    ACK + 8bit line count / NAK
320x07	 Query operation buffer size	 none						    ACK + 16bit size / NAK
330x08	 Query maximum write-n length	 none						    ACK + 24bit length (0==2^24) / NAK
340x09	 Read byte			 24-bit addr					    ACK + BYTE / NAK
350x0A	 Read n bytes			 24-bit addr + 24-bit length			    ACK + length bytes / NAK
360x0B	 Initialize operation buffer	 none						    ACK / NAK
370x0C	 Write to opbuf: Write byte	 24-bit addr + 8-bit byte			    ACK / NAK (NOTE: takes 5 bytes in opbuf)
380x0D	 Write to opbuf: Write n	 24-bit length + 24-bit addr + length bytes of data ACK / NAK (NOTE: takes 7+n bytes in opbuf)
390x0E	 Write to opbuf: delay		 32-bit usecs					    ACK / NAK (NOTE: takes 5 bytes in opbuf)
400x0F	 Execute operation buffer	 none						    ACK / NAK
410x10	 Sync NOP			 none						    NAK + ACK (for synchronization)
420x11	 Query maximum read-n length	 none						    ACK + 24-bit length (0==2^24) / NAK
430x12	 Set used bustype		 8-bit flags (as with 0x05)			    ACK / NAK
440x13	 Perform SPI operation		 24-bit slen + 24-bit rlen + slen bytes of data	    ACK + rlen bytes of data / NAK
450x14	 Set SPI clock frequency in Hz	 32-bit requested frequency			    ACK + 32-bit set frequency / NAK
460x15	 Toggle flash chip pin drivers	 8-bit (0 disable, else enable)			    ACK / NAK
470x16	 Set SPI Chip Select		 8-bit						    ACK / NAK
480x17	 Set SPI Mode			 8-bit						    ACK / NAK
490x18	 Set CS Mode			 8-bit						    ACK / NAK
500x??	 unimplemented command - invalid
51======== =============================== ================================================== =================================================
52
53Additional information of the above commands:
54
55	About unimplemented commands / startup sequence:
56		Only commands allowed to be used without checking anything are 0x00,0x10 and 0x01 (NOP,SYNCNOP,Q_IFACE).
57		If 0x01 doesn't return 1, dont do anything if you dont support a newer protocol.
58		Then, check support for any other opcode (except 0x02) by using 0x02 (Q_CMDMAP).
59
60	0x02 (Q_CMDMAP):
61		The map's bits are mapped as follows:
62		cmd 0 support: byte 0 bit 0
63		cmd 1 support: byte 0 bit 1
64		cmd 7 support: byte 0 bit 7
65		cmd 8 support: byte 1 bit 0, and so on.
66
67	0x04 (Q_SERBUF):
68		If the programmer has a guaranteed working flow control,
69		it should return a big bogus value - eg 0xFFFF.
70
71	0x05 (Q_BUSTYPE):
72		The bit's are defined as follows:
73		bit 0: PARALLEL, bit 1: LPC, bit 2: FWH, bit 3: SPI.
74
75	0x06 (Q_CHIPSIZE):
76		Only applicable to parallel programmers.
77		An LPC/FWH/SPI-programmer can report this as not supported in the command bitmap.
78
79	0x08 (Q_WRNMAXLEN):
80		If a programmer reports a bigger maximum write-n length than the serial buffer size,
81		it is assumed that the programmer can process the data fast enough to take in the
82		reported maximum write-n without problems.
83
84	0x0F (O_EXEC):
85		Execute operation buffer will also clear it, regardless of the return value.
86
87	0x11 (Q_RDNMAXLEN):
88		If this command is not supported, assume return of 0 (2^24).
89
90	0x12 (S_BUSTYPE):
91		Set's the used bustype if the programmer can support more than one flash protocol.
92		Sending a byte with more than 1 bit set will make the programmer decide among them
93		on it's own. Bit values as with Q_BUSTYPE.
94
95	0x13 (O_SPIOP):
96		Send and receive bytes via SPI.
97		Maximum slen is Q_WRNMAXLEN in case Q_BUSTYPE returns SPI only or S_BUSTYPE was used
98		to set SPI exclusively before. Same for rlen and Q_RDNMAXLEN.
99		This operation is immediate, meaning it doesn't use the operation buffer.
100
101	0x14 (S_SPI_FREQ):
102		Set the SPI clock frequency. The 32-bit value indicates the
103		requested frequency in Hertz. Value 0 is reserved and should
104		be NAKed by the programmer. The requested frequency should be
105		mapped by the programmer software to a supported frequency
106		lower than the one requested. If there is no lower frequency
107		available the lowest possible should be used. The value
108		chosen is sent back in the reply with an ACK.
109
110	0x15 (S_PIN_STATE):
111		Sets the state of the pin drivers connected to the flash chip. Disabling them allows other
112		devices (e.g. a mainboard's chipset) to access the chip. This way the serprog controller can
113		remain attached to the flash chip even when the board is running. The user is responsible to
114		NOT connect VCC and other permanently externally driven signals to the programmer as needed.
115		If the value is 0, then the drivers should be disabled, otherwise they should be enabled.
116
117	0x16 (S_SPI_CS):
118		Set which SPI Chip Select pin to use. This operation is immediate,
119		meaning it doesn't use the operation buffer.
120
121	0x17 (S_SPI_MODE):
122		Set which SPI Mode to use for 0x13 O_SPIOP commands.
123		This operation is immediate, meaning it doesn't use the operation buffer.
124		The current defined modes are:
125
126			* 0x00: SPI Half Duplex (default)
127			* 0x01: SPI Full Duplex
128
129	0x18 (S_CS_MODE):
130		Set which CS Mode to use. The CS Mode determines the CS behaviour.
131		This allows manual control over the CS.
132		This operation is immediate, meaning it doesn't use the operation buffer.
133		The current defined modes are:
134
135			* 0x00: CS Auto Mode. The CS gets selected before 0x13 O_SPIOP commands and
136			  deselected afterwards. (default)
137			* 0x01: CS Selected. The CS will be selected until another mode is set.
138			* 0x02: CS Deselected. The CS will be deselected until another mode is set.
139
140	About mandatory commands:
141		The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10,
142		but one can't really do anything with these commands.
143		Support for the following commands is necessary for flashrom to operate properly:
144		S_CMD_Q_SERBUF, S_CMD_Q_OPBUF, S_CMD_Q_WRNMAXLEN, S_CMD_R_BYTE,
145		S_CMD_R_NBYTES, S_CMD_O_INIT, S_CMD_O_WRITEB, S_CMD_O_WRITEN,
146		S_CMD_O_DELAY, S_CMD_O_EXEC.
147		In addition, support for these commands is recommended:
148		S_CMD_Q_PGMNAME, S_CMD_Q_BUSTYPE, S_CMD_Q_CHIPSIZE (if parallel).
149
150See also ``serprog.c``
151