1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/mmio.h>
4 #include <soc/addressmap.h>
5 #include <soc/grf.h>
6 #include <soc/soc.h>
7 #include <soc/pwm.h>
8 #include <soc/clock.h>
9 #include <timer.h>
10
11 struct pwm_ctl {
12 u32 pwm_cnt;
13 u32 pwm_period_hpr;
14 u32 pwm_duty_lpr;
15 u32 pwm_ctrl;
16 };
17
18 struct rk_pwm_regs {
19 struct pwm_ctl pwm[4];
20 u32 intsts;
21 u32 int_en;
22 };
23 check_member(rk_pwm_regs, int_en, 0x44);
24
25 #define RK_PWM_DISABLE (0 << 0)
26 #define RK_PWM_ENABLE (1 << 0)
27
28 #define PWM_ONE_SHOT (0 << 1)
29 #define PWM_CONTINUOUS (1 << 1)
30 #define RK_PWM_CAPTURE (1 << 2)
31
32 #define PWM_DUTY_POSTIVE (1 << 3)
33 #define PWM_DUTY_NEGATIVE (0 << 3)
34
35 #define PWM_INACTIVE_POSTIVE (1 << 4)
36 #define PWM_INACTIVE_NEGATIVE (0 << 4)
37
38 #define PWM_OUTPUT_LEFT (0 << 5)
39 #define PWM_OUTPUT_CENTER (1 << 5)
40
41 #define PWM_LP_ENABLE (1 << 8)
42 #define PWM_LP_DISABLE (0 << 8)
43
44 #define PWM_SEL_SCALE_CLK (1 << 9)
45 #define PWM_SEL_SRC_CLK (0 << 9)
46
47 struct rk_pwm_regs *rk_pwm = (void *)RK_PWM_BASE;
48
pwm_init(u32 id,u32 period_ns,u32 duty_ns)49 void pwm_init(u32 id, u32 period_ns, u32 duty_ns)
50 {
51 unsigned long period, duty;
52
53 #if CONFIG(SOC_ROCKCHIP_RK3288)
54 /*use rk pwm*/
55 write32(&rk3288_grf->soc_con2, RK_SETBITS(1 << 0));
56 #endif
57
58 write32(&rk_pwm->pwm[id].pwm_ctrl, PWM_SEL_SRC_CLK |
59 PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_CONTINUOUS |
60 PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE | RK_PWM_DISABLE);
61
62 period = (PWM_CLOCK_HZ / 1000) * period_ns / USECS_PER_SEC;
63 duty = (PWM_CLOCK_HZ / 1000) * duty_ns / USECS_PER_SEC;
64
65 write32(&rk_pwm->pwm[id].pwm_period_hpr, period);
66 write32(&rk_pwm->pwm[id].pwm_duty_lpr, duty);
67 setbits32(&rk_pwm->pwm[id].pwm_ctrl, RK_PWM_ENABLE);
68 }
69