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/linux-6.14.4/tools/testing/selftests/riscv/vector/
Dvstate_prctl.c14 int test_and_compare_child(long provided, long expected, int inherit, int xtheadvector) in test_and_compare_child() argument
24 rc = launch_test(NEXT_PROGRAM, inherit, xtheadvector); in test_and_compare_child()
95 int xtheadvector = 0; in TEST() local
99 xtheadvector = 1; in TEST()
107 EXPECT_EQ(0, test_and_compare_child(flag, PR_RISCV_V_VSTATE_CTRL_ON, 0, xtheadvector)); in TEST()
113 int xtheadvector = 0; in TEST() local
117 xtheadvector = 1; in TEST()
125 EXPECT_EQ(0, test_and_compare_child(flag, PR_RISCV_V_VSTATE_CTRL_OFF, 1, xtheadvector)); in TEST()
131 int xtheadvector = 0; in TEST() local
135 xtheadvector = 1; in TEST()
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Dv_initval.c10 int xtheadvector = 0; in TEST() local
14 xtheadvector = 1; in TEST()
19 ASSERT_EQ(0, launch_test(NEXT_PROGRAM, 0, xtheadvector)); in TEST()
Dvstate_exec_nolibc.c9 int rc, pid, status, test_inherit = 0, xtheadvector = 0; in main() local
17 xtheadvector = 1; in main()
59 if (xtheadvector) in main()
Dv_helpers.c29 int launch_test(char *next_program, int test_inherit, int xtheadvector) in launch_test() argument
43 exec_argv[2] = xtheadvector != 0 ? "x" : NULL; in launch_test()
Dv_helpers.h8 int launch_test(char *next_program, int test_inherit, int xtheadvector);
/linux-6.14.4/arch/riscv/
DKconfig.vendor32 bool "xtheadvector extension support"
38 Say N here if you want to disable all xtheadvector related procedures
40 contains xtheadvector rather than the standard vector.
DKconfig.errata127 The T-Head C9xx cores have a vulnerability in the xtheadvector
129 to determine if they are vulnerable and disable xtheadvector.
/linux-6.14.4/arch/riscv/kernel/vendor_extensions/
Dthead_hwprobe.c17 VENDOR_EXT_KEY(XTHEADVECTOR); in hwprobe_isa_vendor_ext_thead_0()
Dthead.c13 __RISCV_ISA_EXT_DATA(xtheadvector, RISCV_ISA_VENDOR_EXT_XTHEADVECTOR),
/linux-6.14.4/arch/riscv/errata/thead/
Derrata.c156 * xtheadvector, there is no futher granularity than c9xx. Assume in errata_probe_ghostwrite()
157 * vulnerable for this entire class of processors when xtheadvector is in errata_probe_ghostwrite()
/linux-6.14.4/arch/riscv/kernel/
Dbugs.c51 return sprintf(buf, "Mitigation: xtheadvector disabled\n"); in cpu_show_ghostwrite()
Dcpufeature.c894 * to disable xtheadvector if necessary. in riscv_fill_hwcap_from_ext_list()
/linux-6.14.4/arch/riscv/include/asm/
Dcsr.h33 #define SR_VS_THEAD _AC(0x01800000, UL) /* xtheadvector Status */
324 /* xtheadvector symbolic CSR names */
328 /* xtheadvector CSR masks */
Dvector.h68 return riscv_isa_vendor_extension_available(THEAD_VENDOR_ID, XTHEADVECTOR); in has_xtheadvector_no_alternatives()
/linux-6.14.4/arch/riscv/boot/dts/allwinner/
Dsun20i-d1s.dtsi30 "zifencei", "zihpm", "xtheadvector";
/linux-6.14.4/Documentation/devicetree/bindings/riscv/
Dextensions.yaml636 - const: xtheadvector
639 …m/T-head-Semi/thead-extension-spec/blob/95358cb2cca9489361c61d335e03d3134b14133f/xtheadvector.adoc.
/linux-6.14.4/Documentation/arch/riscv/
Dhwprobe.rst303 * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR`: The xtheadvector vendor