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/linux-6.14.4/drivers/acpi/acpica/
Dexregion.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: exregion - ACPI default op_region (address space) handlers
6 * Copyright (C) 2000 - 2023, Intel Corp.
21 * PARAMETERS: function - Read or Write operation
22 * address - Where in the space to read or write
23 * bit_width - Field width in bits (8, 16, or 32)
24 * value - Pointer to in or out value
25 * handler_context - Pointer to Handler's context
26 * region_context - Pointer to context specific to the
44 struct acpi_mem_mapping *mm = mem_info->cur_mm; in acpi_ex_system_memory_space_handler() local
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/linux-6.14.4/Documentation/devicetree/bindings/display/panel/
Dsgd,gktw70sdae4se.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: sgd,gktw70sdae4se
30 - const: panel-lvds
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Dadvantech,idk-1110wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-1110wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-1110WR 10.1" WSVGA LVDS Display Panel
10 - Lad Prabhakar <prabhakar.mahadev-[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
21 const: advantech,idk-1110wr
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Dmitsubishi,aa104xd12.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: mitsubishi,aa104xd12
30 - const: panel-lvds
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Dmitsubishi,aa121td01.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: mitsubishi,aa121td01
30 - const: panel-lvds
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Dsamsung,s6e8aa0.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrzej Hajda <[email protected]>
13 - $ref: panel-common.yaml#
22 reset-gpios: true
23 display-timings: true
24 flip-horizontal: true
25 flip-vertical: true
27 vdd3-supply:
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Dadvantech,idk-2121wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
10 - Lad Prabhakar <prabhakar.mahadev-[email protected]>
11 - Thierry Reding <[email protected]>
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
20 dual-lvds-odd-pixels or dual-lvds-even-pixels).
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Dsamsung,ld9040.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrzej Hajda <[email protected]>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 display-timings: true
25 reset-gpios: true
27 vdd3-supply:
30 vci-supply:
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Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Laurent Pinchart <[email protected]>
24 width-mm:
26 Specifies the width of the physical area where images are displayed. This
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
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Dinnolux,ee101ia-01d.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/innolux,ee101ia-01d.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel
10 - Heiko Stuebner <[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
21 const: innolux,ee101ia-01d
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Dtpo,tpg110.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <[email protected]>
11 - Thierry Reding <[email protected]>
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
24 RGB -> | TPG110 |
25 +--------+
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Draydium,rm67191.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
10 - Robert Chiras <[email protected]>
13 - $ref: panel-common.yaml#
23 reset-gpios: true
24 width-mm: true
25 height-mm: true
27 dsi-lanes:
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Dpanel-mipi-dbi-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Noralf Trønnes <[email protected]>
23 - Power:
24 - Vdd: Power supply for display module
25 Called power-supply in this binding.
26 - Vddi: Logic level supply for interface signals
27 Called io-supply in this binding.
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/linux-6.14.4/include/linux/
Drslib.h1 // SPDX-License-Identifier: GPL-2.0
17 * struct rs_codec - rs codec data
19 * @mm: Bits per symbol
20 * @nn: Symbols per block (= (1<<mm)-1)
27 * @iprim: prim-th root of 1, index form
29 * @gffunc: Function to generate the field, if non-canonical representation
34 int mm; member
50 * struct rs_control - rs control structure per instance
59 /* General purpose RS codec, 8-bit data width, symbol width 1-15 bit */
70 /* General purpose RS codec, 16-bit data width, symbol width 1-15 bit */
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/linux-6.14.4/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_mman.c2 * SPDX-License-Identifier: MIT
31 unsigned int width; member
41 return (offset & BIT_ULL(bit)) >> (bit - 6); in swizzle_bit()
48 if (tile->tiling == I915_TILING_NONE) in tiled_offset()
51 y = div64_u64_rem(v, tile->stride, &x); in tiled_offset()
52 v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; in tiled_offset()
54 if (tile->tiling == I915_TILING_X) { in tiled_offset()
55 v += y * tile->width; in tiled_offset()
56 v += div64_u64_rem(x, tile->width, &x) << tile->size; in tiled_offset()
58 } else if (tile->width == 128) { in tiled_offset()
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/linux-6.14.4/arch/arm/boot/dts/nxp/imx/
Dimx6q-var-mx6customboard.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite MX6 Carrier-board
9 /dts-v1/;
11 #include "imx6qdl-var-som.dtsi"
12 #include <dt-bindings/pwm/pwm.h>
15 model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board";
16 compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q";
18 panel0: lvds-panel0 {
19 compatible = "panel-lvds";
21 width-mm = <152>;
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/linux-6.14.4/Documentation/gpu/amdgpu/display/
Dmulti-display-hdcp-mpo.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
12 width="103.08798mm"
13 height="30.335283mm"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
18 sodipodi:docname="multi-display-hdcp-mpo.svg">
31 d="M 5.77,0 -2.88,5 V -5 Z"
32 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
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Dmulti-display-hdcp-mpo-less-pipe-ex.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
12 width="103.08798mm"
13 height="30.335283mm"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
18 sodipodi:docname="multi-display-hdcp-mpo-less-pipe-ex.svg">
31 d="M 5.77,0 -2.88,5 V -5 Z"
32 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
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Dsingle-display-mpo.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
12 width="148.71147mm"
13 height="38.356358mm"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
18 sodipodi:docname="single-display-mpo.svg">
31 d="M 5.77,0 -2.88,5 V -5 Z"
32 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
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Dsingle-display-mpo-multi-video.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
12 width="112.16296mm"
13 height="93.314507mm"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
18 sodipodi:docname="single-display-mpo-multi-video.svg">
31 d="M 5.77,0 -2.88,5 V -5 Z"
32 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
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/linux-6.14.4/drivers/staging/axis-fifo/
Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
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/linux-6.14.4/drivers/clk/sprd/
Dums512-clk.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/sprd,ums512-clk.h>
33 static CLK_FIXED_FACTOR_FW_NAME(clk_26m_aud, "clk-26m-aud", "ext-26m", 1, 1, 0);
34 static CLK_FIXED_FACTOR_FW_NAME(clk_13m, "clk-13m", "ext-26m", 2, 1, 0);
35 static CLK_FIXED_FACTOR_FW_NAME(clk_6m5, "clk-6m5", "ext-26m", 4, 1, 0);
36 static CLK_FIXED_FACTOR_FW_NAME(clk_4m3, "clk-4m3", "ext-26m", 6, 1, 0);
37 static CLK_FIXED_FACTOR_FW_NAME(clk_2m, "clk-2m", "ext-26m", 13, 1, 0);
38 static CLK_FIXED_FACTOR_FW_NAME(clk_1m, "clk-1m", "ext-26m", 26, 1, 0);
39 static CLK_FIXED_FACTOR_FW_NAME(clk_250k, "clk-250k", "ext-26m", 104, 1, 0);
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/linux-6.14.4/arch/x86/mm/
Ddump_pagetables.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/mm.h>
108 [END_OF_SPACE_NR] = { -1, NULL }
144 [END_OF_SPACE_NR] = { -1, NULL }
231 npages = (addr - st->start_address) / PAGE_SIZE; in note_wx()
238 if (pcibios_enabled && st->start_address >= PAGE_OFFSET + BIOS_BEGIN && in note_wx()
240 pr_warn_once("x86/mm: PCI BIOS W+X mapping %lu pages\n", npages); in note_wx()
245 st->wx_pages += npages; in note_wx()
247 "x86/mm: Found insecure W+X mapping at address %pS\n", in note_wx()
248 (void *)st->start_address); in note_wx()
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/linux-6.14.4/drivers/accel/amdxdna/
Daie2_ctx.c1 // SPDX-License-Identifier: GPL-2.0
37 if (job->out_fence) in aie2_job_release()
38 dma_fence_put(job->out_fence); in aie2_job_release()
44 kref_put(&job->refcnt, aie2_job_release); in aie2_job_put()
51 drm_sched_stop(&hwctx->priv->sched, bad_job); in aie2_hwctx_stop()
52 aie2_destroy_context(xdna->dev_handle, hwctx); in aie2_hwctx_stop()
57 struct amdxdna_gem_obj *heap = hwctx->priv->heap; in aie2_hwctx_restart()
60 ret = aie2_create_context(xdna->dev_handle, hwctx); in aie2_hwctx_restart()
66 ret = aie2_map_host_buf(xdna->dev_handle, hwctx->fw_ctx_id, in aie2_hwctx_restart()
67 heap->mem.userptr, heap->mem.size); in aie2_hwctx_restart()
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/linux-6.14.4/drivers/gpu/drm/panel/
Dpanel-tpo-tpg110.c1 // SPDX-License-Identifier: GPL-2.0
7 * display is actually connected to it, so the width and height of that
41 * struct tpg110_panel_mode - lookup struct for the supported modes
63 * struct tpg110 - state container for the TPG110 panel
83 * @width: the width of this panel in mm
85 u32 width; member
87 * @height: the height of this panel in mm
223 * The last bit/clock is Hi-Z turnaround cycle, so we need in tpg110_readwrite_reg()
225 * turn-around cycle. in tpg110_readwrite_reg()
238 ret = spi_sync(tpg->spi, &m); in tpg110_readwrite_reg()
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