| /linux-6.14.4/Documentation/devicetree/bindings/net/ |
| D | marvell-bt-8xxx.txt | 2 ------
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
21 firmware will use the pin to wakeup host system (u16).
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
25 - interrupt-names: Used only for USB based devices (See below)
26 - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the
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| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | samsung,pinctrl-wakeup-interrupt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller
10 - Krzysztof Kozlowski <[email protected]>
11 - Sylwester Nawrocki <[email protected]>
12 - Tomasz Figa <[email protected]>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18 External wake-up interrupts for Samsung S3C/S5P/Exynos SoC pin controller.
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| D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller
10 - Krzysztof Kozlowski <[email protected]>
11 - Sylwester Nawrocki <[email protected]>
12 - Tomasz Figa <[email protected]>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18 All the pin controller nodes should be represented in the aliases node using
22 - External GPIO interrupts (see interrupts property in pin controller node);
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| D | ste,nomadik.txt | 4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
7 (these have the register ranges used by the pin controller).
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
16 pin, a group, or a list of pins or groups. This configuration can include the
17 mux function to select on those pin(s)/group(s), and various pin configuration
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| D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
23 uart1(cts), lcd-spi(cs1), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso),
46 mpp21 21 gpio, sdio0(wp), sdio1(wp), spi1(cs), lcd-spi(cs0),
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| /linux-6.14.4/drivers/pinctrl/samsung/ |
| D | pinctrl-samsung.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25 * enum pincfg_type - possible pin configuration types supported.
27 * @PINCFG_TYPE_DAT: Pin value configuration.
30 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
45 * pin configuration (pull up/down and drive strength) type and its value are
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
57 * Values for the pin CON register, choosing pin function.
64 /* Values for the pin PUD register */
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| D | pinctrl-s3c64xx.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // S3C64xx specific support for pinctrl-samsung driver.
7 // Based on pinctrl-exynos.c, please see the file for original copyrights.
11 // external gpio and wakeup interrupt support.
24 #include "pinctrl-samsung.h"
31 /* External GPIO and wakeup interrupt related definitions */
116 .eint_mask = (1 << (pins)) - 1, \
140 .eint_mask = (1 << (pins)) - 1, \
194 .eint_mask = (1 << (pins)) - 1, \
200 * struct s3c64xx_eint0_data - EINT0 common data
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| /linux-6.14.4/Documentation/devicetree/bindings/net/wireless/ |
| D | marvell,sd8787.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <[email protected]>
11 - Frank Li <[email protected]>
21 - marvell,sd8787
22 - marvell,sd8897
23 - marvell,sd8978
24 - marvell,sd8997
25 - nxp,iw416
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| /linux-6.14.4/Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
13 RTC alarm rings. In order to mark the device has a wakeup source and
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
29 Example isl12057 node without IRQ#2 pin connected (no alarm support):
37 Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note
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| D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock
10 - Paul Cercueil <[email protected]>
13 - $ref: rtc.yaml#
14 - if:
20 - ingenic,jz4770-rtc
21 - ingenic,jz4780-rtc
24 "#clock-cells": false
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| /linux-6.14.4/arch/arm64/boot/dts/exynos/ |
| D | exynosautov9-sadk.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9";
18 #address-cells = <2>;
19 #size-cells = <2>;
26 stdout-path = &serial_0;
36 gpio-keys {
37 compatible = "gpio-keys";
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| D | exynos8895-dreamlte.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Samsung Galaxy S8 (dreamlte/SM-G950F) device tree source
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "Samsung Galaxy S8 (SM-G950F)";
17 chassis-type = "handset";
20 #address-cells = <2>;
21 #size-cells = <1>;
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| /linux-6.14.4/drivers/pinctrl/freescale/ |
| D | pinctrl-scu.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
16 #include "pinctrl-imx.h"
20 #define IMX_SC_IRQ_GROUP_WAKE 3 /* Wakeup interrupts */
21 #define IMX_SC_IRQ_PAD 2 /* Pad wakeup */
47 u8 wakeup; member
68 hdr->ver = IMX_SC_RPC_VERSION; in imx_pinconf_get_scu()
69 hdr->svc = IMX_SC_RPC_SVC_PAD; in imx_pinconf_get_scu()
70 hdr->func = IMX_SC_PAD_FUNC_GET; in imx_pinconf_get_scu()
71 hdr->size = 2; in imx_pinconf_get_scu()
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| /linux-6.14.4/Documentation/arch/arm/pxa/ |
| D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
18 detection of each pin. Below is a diagram of internal connections between
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
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| /linux-6.14.4/Documentation/devicetree/bindings/input/ |
| D | nvidia,tegra20-kbc.txt | 2 The key controller has maximum 24 pins to make matrix keypad. Any pin
3 can be configured as row or column. The maximum column pin can be 8
7 - compatible: "nvidia,tegra20-kbc"
8 - reg: Register base address of KBC.
9 - interrupts: Interrupt number for the KBC.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
11 array of pin numbers which is used as rows.
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
13 array of pin numbers which is used as column.
14 - linux,keymap: The keymap for keys as described in the binding document
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| D | atmel,maxtouch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nick Dyer <[email protected]>
11 - Linus Walleij <[email protected]>
18 - $ref: input.yaml#
30 vdda-supply:
34 vdd-supply:
38 reset-gpios:
41 Optional GPIO specifier for the touchscreen's reset pin
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| /linux-6.14.4/Documentation/devicetree/bindings/soc/ti/ |
| D | wkup-m3-ipc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Wakeup M3 IPC device
10 - Dave Gerlach <d-[email protected]>
11 - Drew Fustini <[email protected]>
14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
15 (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks
17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
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| /linux-6.14.4/drivers/pinctrl/qcom/ |
| D | pinctrl-msm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct msm_pingroup - Qualcomm pingroup definition
39 * @grp: Generic data of the pin group (name and pins)
62 * wakeup events.
63 * @intr_wakeup_enable_bit: Offset in @intr_target_reg to enable wakeup events for the GPIO.
118 * struct msm_gpio_wakeirq_map - Map of GPIOs and their wakeup pins
119 * @gpio: The GPIOs that are wakeup capable
120 * @wakeirq: The interrupt at the always-on interrupt controller
128 * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
129 * @pins: An array describing all pins the pin controller affects.
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| /linux-6.14.4/Documentation/devicetree/bindings/net/bluetooth/ |
| D | brcm,bluetooth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <[email protected]>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
22 - enum:
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| /linux-6.14.4/Documentation/devicetree/bindings/regulator/ |
| D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <[email protected]>
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
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| /linux-6.14.4/Documentation/devicetree/bindings/gnss/ |
| D | sirfstar.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <[email protected]>
23 - $ref: gnss-common.yaml#
24 - $ref: /schemas/serial/serial-peripheral-props.yaml#
29 - csr,gsd4t
30 - csr,csrg05ta03-icje-r
31 - fastrax,uc430
32 - linx,r4
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| /linux-6.14.4/arch/arm64/boot/dts/exynos/google/ |
| D | gs101-oriole.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <[email protected]>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
19 compatible = "google,gs101-oriole", "google,gs101";
28 stdout-path = &serial_0;
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| /linux-6.14.4/arch/arm/boot/dts/samsung/ |
| D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
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| /linux-6.14.4/Documentation/devicetree/bindings/input/touchscreen/ |
| D | sis_i2c.txt | 4 - compatible: must be "sis,9200-ts"
5 - reg: i2c slave address
6 - interrupts: touch controller interrupt (see interrupt
10 - pinctrl-names: should be "default" (see pinctrl binding [1]).
11 - pinctrl-0: a phandle pointing to the pin settings for the
13 - attn-gpios: the gpio pin used as attention line
14 - reset-gpios: the gpio pin used to reset the controller
15 - wakeup-source: touchscreen can be used as a wakeup source
17 [0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
18 [1]: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
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| D | egalax-ts.txt | 4 - compatible: must be "eeti,egalax_ts"
5 - reg: i2c slave address
6 - interrupts: touch controller interrupt
7 - wakeup-gpios: the gpio pin to be used for waking up the controller
8 and also used as irq pin
15 interrupt-parent = <&gpio1>;
17 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|