/linux-6.14.4/Documentation/devicetree/bindings/mtd/ |
D | mtd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <[email protected]> 11 - Richard Weinberger <[email protected]> 21 User-defined MTD device name. Can be used to assign user friendly 26 '#address-cells': 29 '#size-cells': 36 - compatible 39 "@[0-9a-f]+$": [all …]
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D | nand-macronix.txt | 2 ----------------------------------- 4 Macronix NANDs support randomizer operation for scrambling user data, 11 For more high-reliability concern, if subpage write is not available 17 - randomizer enable: should be "mxic,enable-randomizer-otp" 21 nand: nand-controller@unit-address { 25 mxic,enable-randomizer-otp;
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/linux-6.14.4/drivers/mtd/spi-nor/ |
D | otp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * OTP support for SPI NOR flashes 10 #include <linux/mtd/spi-nor.h> 14 #define spi_nor_otp_region_len(nor) ((nor)->params->otp.org->len) 15 #define spi_nor_otp_n_regions(nor) ((nor)->params->otp.org->n_regions) 18 * spi_nor_otp_read_secr() - read security register 27 * an one-time-programmable memory area, consisting of multiple bytes (usually 28 * 256). Thus one "security register" maps to one OTP region. 34 * Return: number of bytes read successfully, -errno otherwise 43 read_opcode = nor->read_opcode; in spi_nor_otp_read_secr() [all …]
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/linux-6.14.4/include/uapi/mtd/ |
D | mtd-abi.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 3 * Copyright © 1999-2010 David Woodhouse <[email protected]> et al. 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction; 69 * struct mtd_write_req - data structure for requesting a write operation 74 * @usr_data: user-provided data buffer 75 * @usr_oob: user-provided OOB buffer 80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to 81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and 95 * struct mtd_read_req_ecc_stats - ECC statistics for a read operation [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/nvmem/ |
D | microchip,lan9662-otpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/microchip,lan9662-otpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip LAN9662 OTP Controller (OTPC) 10 - Horatiu Vultur <[email protected]> 13 OTP controller drives a NVMEM memory where system specific data 15 user specific data could be stored. 18 - $ref: nvmem.yaml# 23 - items: [all …]
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D | microchip,sama7g5-otpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/microchip,sama7g5-otpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip SAMA7G5 OTP Controller (OTPC) 10 - Claudiu Beznea <[email protected]> 13 OTP controller drives a NVMEM memory where system specific data 15 settings, chip identifiers) or user specific data could be stored. 18 - $ref: nvmem.yaml# 19 - $ref: nvmem-deprecated-cells.yaml# [all …]
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/linux-6.14.4/drivers/mtd/chips/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 support any device that is CFI-compliant, you need to enable this 18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" 22 This option enables JEDEC-style probing of flash chips which are not 24 CFI-targeted flash drivers for any chips which are identified which 26 covers most AMD/Fujitsu-compatible chips and also non-CFI 53 are expected to be wired to the CPU in 'host-endian' form. 85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY 92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY 99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY [all …]
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D | cfi_cmdset_0001.c | 1 // SPDX-License-Identifier: GPL-2.0 10 * - completely revamped method functions so they are aware and 12 * - scalability vs code size is completely set at compile-time 14 * - optimized write buffer method 16 * - reworked lock/unlock/erase support for var size flash 18 * - auto unlock sectors on resume for auto locking flash on power up 124 printk(" Extended Query version %c.%c\n", extp->MajorVersion, extp->MinorVersion); in cfi_tell_features() 125 printk(" Feature/Command Support: %4.4X\n", extp->FeatureSupport); in cfi_tell_features() 126 printk(" - Chip Erase: %s\n", extp->FeatureSupport&1?"supported":"unsupported"); in cfi_tell_features() 127 printk(" - Suspend Erase: %s\n", extp->FeatureSupport&2?"supported":"unsupported"); in cfi_tell_features() [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/nvmem/layouts/ |
D | kontron,sl28-vpd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/layouts/kontron,sl28-vpd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVMEM layout of the Kontron SMARC-sAL28 vital product data 10 - Michael Walle <[email protected]> 15 on-board ethernet devices are derived from this base MAC address by 22 const: kontron,sl28-vpd 24 serial-number: 30 base-mac-address: [all …]
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D | onie,tlv-layout.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/layouts/onie,tlv-layout.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <[email protected]> 14 infrastructure shall provide a non-volatile memory with a table whose the 26 const: onie,tlv-layout 28 product-name: 32 part-number: 36 serial-number: [all …]
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/linux-6.14.4/drivers/mtd/nand/onenand/ |
D | onenand_base.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright © 2005-2009 Samsung Electronics 9 * Adrian Hunter <ext-[email protected]>: 10 * auto-placement support, read-while load support, various fixes 13 * Flex-OneNAND support 15 * OTP support 39 /* Default Flex-OneNAND boundary and lock respectively */ 40 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 43 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" 47 " : 0->Set boundary in unlocked status" [all …]
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/linux-6.14.4/Documentation/security/keys/ |
D | trusted-encrypted.rst | 7 and in both cases all keys are created in the kernel, and user space sees, 10 system. All user level blobs, are displayed and loaded in hex ASCII for 33 (2) TEE (Trusted Execution Environment: OP-TEE based on Arm TrustZone) 35 Rooted to Hardware Unique Key (HUK) which is generally burnt in on-chip 41 mode, trust is rooted to the OTPMK, a never-disclosed 256-bit key 45 (4) DCP (Data Co-Processor: crypto accelerator of various i.MX SoCs) 47 Rooted to a one-time programmable key (OTP) that is generally burnt 48 in the on-chip fuses and is accessible to the DCP encryption engine only. 49 DCP provides two keys that can be used as root of trust: the OTP key 51 the OTP key can be done via a module parameter (dcp_use_otp_key). [all …]
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/linux-6.14.4/Documentation/ABI/stable/ |
D | sysfs-bus-nvmem | 6 This read/write attribute allows users to set read-write 7 devices as read-only and back to read-write from userspace. 8 This can be used to unlock and relock write-protection of 11 Read returns '0' or '1' for read-write or read-only modes 23 This file allows user to read/write the raw NVMEM contents. 46 This read-only attribute allows user to read the NVMEM 48 "OTP", "Battery backed", "FRAM".
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/linux-6.14.4/drivers/nvmem/ |
D | microchip-otpc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * OTP Memory controller 13 #include <linux/nvmem-provider.h> 28 #define MCHP_OTPC_NAME "mchp-otpc" 32 * struct mchp_otpc - OTPC private data structure 35 * @packets: list of packets in OTP memory 36 * @npackets: number of packets in OTP memory 46 * struct mchp_otpc_packet - OTPC packet data structure 49 * @offset: packet offset (in words) in OTP memory 62 if (id >= otpc->npackets) in mchp_otpc_id_to_packet() [all …]
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/linux-6.14.4/Documentation/ABI/testing/ |
D | sysfs-platform-silicom | 1 What: /sys/devices/platform/silicom-platform/uc_version 4 Contact: Henry Shi <henrys@silicom-usa.com> 9 What: /sys/devices/platform/silicom-platform/power_cycle 12 Contact: Henry Shi <henrys@silicom-usa.com> 14 This file allow user to power cycle the platform. 19 0 - default value. 21 What: /sys/devices/platform/silicom-platform/efuse_status 24 Contact: Henry Shi <henrys@silicom-usa.com> 27 OTP status: 29 0 - not programmed. [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/clock/ |
D | renesas,5p35023.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biju Das <[email protected]> 14 is designed for low-power, consumer, and high-performance PCI 19 An internal OTP memory allows the user to store the configuration 20 in the device. After power up, the user can change the device register 29 …renesas.com/us/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3… 34 - renesas,5l35023 35 - renesas,5p35023 [all …]
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/linux-6.14.4/drivers/mtd/ |
D | mtdcore.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright © 1999-2010 David Woodhouse <[email protected]> 24 #include <linux/backing-dev.h> 31 #include <linux/nvmem-provider.h> 33 #include <linux/error-injection.h> 95 dev_t index = MTD_DEVT(mtd->index); in mtd_release() 97 idr_remove(&mtd_idr, mtd->index); in mtd_release() 112 debugfs_remove_recursive(mtd->dbg.dfs_dir); in mtd_device_release() 115 nvmem_unregister(mtd->nvmem); in mtd_device_release() 117 device_unregister(&mtd->dev); in mtd_device_release() [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1028a-kontron-sl28.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Device Tree file for the Kontron SMARC-sAL28 board. 9 /dts-v1/; 10 #include "fsl-ls1028a.dtsi" 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 16 model = "Kontron SMARC-sAL28"; 33 compatible = "gpio-keys"; 35 power-button { [all …]
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/linux-6.14.4/drivers/iio/gyro/ |
D | mpu3050-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 39 * Register map: anything suffixed *_H is a big-endian high byte and always 76 /* Bits 8-11 select memory bank */ 163 * Fullscale precision is (for finest precision) +/- 250 deg/s, so the full 184 if (mpu3050->lpf == MPU3050_DLPF_CFG_256HZ_NOLPF2) in mpu3050_get_freq() 188 freq /= (mpu3050->divisor + 1); in mpu3050_get_freq() 200 ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, in mpu3050_start_sampling() 205 /* Turn on the Z-axis PLL */ in mpu3050_start_sampling() 206 ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, in mpu3050_start_sampling() 214 raw_val[i] = cpu_to_be16(mpu3050->calibration[i]); in mpu3050_start_sampling() [all …]
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/linux-6.14.4/drivers/mtd/devices/ |
D | mtd_dataflash.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright (C) 2003-2005 SAN People (Pty) Ltd 28 * Sometimes DataFlash is packaged in MMC-format cards, although the 57 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ 58 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ 60 /* write to buffer, then write-erase to flash */ 68 /* read flash to buffer, then write-erase to flash */ 73 * serial number and OTP bits; and per-sector writeprotect. 129 * This usually takes 5-20 msec or so; more for sector erase. 138 dev_dbg(&spi->dev, "status %d?\n", status); in dataflash_waitready() [all …]
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/linux-6.14.4/drivers/input/mouse/ |
D | alps.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2003-2005 Peter Osterlund <[email protected]> 94 #define ALPS_PASS 0x04 /* device has a pass-through port */ 100 #define ALPS_PS2_INTERLEAVED 0x80 /* 3-byte PS/2 packet interleaved with 101 6-byte ALPS packet */ 117 { { 0x33, 0x02, 0x0a }, { ALPS_PROTO_V1, 0x88, 0xf8, 0 } }, /* UMAX-530T */ 119 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED } }, /* Toshiba Tecra A11-11L */ 128 …{ { 0x63, 0x02, 0x3c }, { ALPS_PROTO_V2, 0x8f, 0x8f, ALPS_WHEEL } }, /* Toshiba Satellite S2400-… 132 …{ { 0x73, 0x00, 0x0a }, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_DUALPOINT } }, /* ThinkPad R61 8918-5QG… 180 /* Reported-by: Hans de Bruin <[email protected]> */ [all …]
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/linux-6.14.4/drivers/media/i2c/ |
D | imx208.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <media/v4l2-ctrls.h> 10 #include <media/v4l2-device.h> 29 /* HBLANK control - read only */ 71 /* OTP Access */ 100 /* V-timing */ 209 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample 293 /* OTP data */ 318 return codes[imx208->vflip->val][imx208->hflip->val]; in imx208_get_format_code() 324 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); in imx208_read_reg() [all …]
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/linux-6.14.4/fs/xfs/ |
D | xfs_trans_dquot.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2000-2002 Silicon Graphics, Inc. 35 ASSERT(dqp->q_logitem.qli_dquot == dqp); in xfs_trans_dqjoin() 40 xfs_trans_add_item(tp, &dqp->q_logitem.qli_item); in xfs_trans_dqjoin() 61 if (dqp->q_id != 0 && in xfs_trans_log_dquot() 62 xfs_has_bigtime(tp->t_mountp) && in xfs_trans_log_dquot() 63 !(dqp->q_type & XFS_DQTYPE_BIGTIME)) in xfs_trans_log_dquot() 64 dqp->q_type |= XFS_DQTYPE_BIGTIME; in xfs_trans_log_dquot() 66 tp->t_flags |= XFS_TRANS_DIRTY; in xfs_trans_log_dquot() 67 set_bit(XFS_LI_DIRTY, &dqp->q_logitem.qli_item.li_flags); in xfs_trans_log_dquot() [all …]
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/linux-6.14.4/drivers/power/supply/ |
D | ab8500-bm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 108 * OTP register offsets 267 * struct ab8500_fg_parameters - Fuel gauge algorithm parameters, in seconds 283 * @user_cap_limit Capacity reported from user must be within this 317 * struct ab8500_charger_maximization - struct used by the board config. 331 * struct ab8500_bm_capacity_levels - ab8500 capacity level data 347 * struct ab8500_bm_charger_parameters - Charger specific parameters 361 * struct ab8500_bm_data - ab8500 battery management data
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/linux-6.14.4/Documentation/devicetree/bindings/iio/adc/ |
D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 STM32 ADC is a successive approximation analog-to-digital converter. 13 stored in a left-aligned or right-aligned 32-bit data register. 17 voltage goes beyond the user-defined, higher or lower thresholds. 22 - Fabrice Gasnier <[email protected]> 27 - st,stm32f4-adc-core 28 - st,stm32h7-adc-core [all …]
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