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/linux-6.14.4/Documentation/devicetree/bindings/serial/
Datmel,at91-usart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Richard Genoud <[email protected]>
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
20 - const: atmel,at91rm9200-dbgu
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Dfsl-imx-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <[email protected]>
15 - const: fsl,imx1-uart
16 - const: fsl,imx21-uart
17 - items:
18 - enum:
19 - fsl,imx25-uart
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/linux-6.14.4/arch/arm/boot/dts/microchip/
Dsam9x7.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x7.dtsi - Device Tree Include file for Microchip SAM9X7 SoC family
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
17 #include <dt-bindings/pinctrl/at91.h>
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Dsam9x60.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
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Dat91-kizbox3_common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-kizbox3.dts - Device Tree Include file for Overkiz Kizbox 3
12 /dts-v1/;
14 #include "sama5d2-pinfunc.h"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
17 #include <dt-bindings/pinctrl/at91.h>
18 #include <dt-bindings/pwm/pwm.h>
36 stdout-path = "serial1:115200n8";
41 clock-frequency = <32768>;
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Dat91-sama5d27_wlsom1_ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
9 /dts-v1/;
10 #include "at91-sama5d27_wlsom1.dtsi"
11 #include <dt-bindings/input/input.h>
15 …compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel…
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 pinctrl-names = "default";
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Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
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Dat91-wb50n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
12 model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
17 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
42 clock-frequency = <12000000>;
46 atmel,osc-bypass;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
52 cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
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/linux-6.14.4/Documentation/devicetree/bindings/dma/
Dstericsson,dma40.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stericsson,dma40.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DMA40 DMA Engine
10 - Linus Walleij <[email protected]>
13 - $ref: dma-controller.yaml#
16 "#dma-cells":
20 table for DB8500 which is the only ASIC known to use DMA40:
32 10: Multi-Channel Display Engine MCDE RX
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Dk3dma.txt1 * Hisilicon K3 DMA controller
3 See dma.txt first
6 - compatible: Must be one of
7 - "hisilicon,k3-dma-1.0"
8 - "hisilicon,hisi-pcm-asp-dma-1.0"
9 - reg: Should contain DMA registers location and length.
10 - interrupts: Should contain one interrupt shared by all channel
11 - #dma-cells: see dma.txt, should be 1, para number
12 - dma-channels: physical channels supported
13 - dma-requests: virtual channels supported, each virtual channel
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/linux-6.14.4/include/linux/
Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
20 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
49 * automatically set as dma devices are registered.
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Ddavinci-mcasp-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-[email protected]>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
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Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <[email protected]>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
15 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
17 playback and DMA channel 3 for capture. The developer can choose which
18 DMA controller to use, but the channels themselves are hard-wired. The
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/linux-6.14.4/crypto/async_tx/
Dasync_raid6_recov.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Asynchronous RAID-6 recovery calculations ASYNC_TX API.
12 #include <linux/dma-mapping.h>
24 struct dma_device *dma = chan ? chan->device : NULL; in async_sum_product() local
30 if (dma) in async_sum_product()
31 unmap = dmaengine_get_unmap_data(dma->dev, 3, GFP_NOWAIT); in async_sum_product()
34 struct device *dev = dma->dev; in async_sum_product()
36 struct dma_async_tx_descriptor *tx; in async_sum_product() local
39 if (submit->flags & ASYNC_TX_FENCE) in async_sum_product()
41 unmap->addr[0] = dma_map_page(dev, srcs[0], src_offs[0], in async_sum_product()
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Dasync_xor.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/dma-mapping.h>
21 /* do_async_xor - dma map the pages and perform the xor with an engine */
26 struct dma_device *dma = chan->device; in do_async_xor() local
27 struct dma_async_tx_descriptor *tx = NULL; in do_async_xor() local
28 dma_async_tx_callback cb_fn_orig = submit->cb_fn; in do_async_xor()
29 void *cb_param_orig = submit->cb_param; in do_async_xor()
30 enum async_tx_flags flags_orig = submit->flags; in do_async_xor()
32 int src_cnt = unmap->to_cnt; in do_async_xor()
34 dma_addr_t dma_dest = unmap->addr[unmap->to_cnt]; in do_async_xor()
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/linux-6.14.4/drivers/net/wireless/ath/ath5k/
Ddma.c2 * Copyright (c) 2004-2008 Reyk Floeter <[email protected]>
3 * Copyright (c) 2006-2008 Nick Kossifidis <[email protected]>
5 * Permission to use, copy, modify, and distribute this software for any
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 * DMA and interrupt masking functions *
24 * DOC: DMA and interrupt masking functions
26 * Here we setup descriptor pointers (rxdp/txdp) start/stop dma engine and
44 * ath5k_hw_start_rx_dma() - Start DMA receive
55 * ath5k_hw_stop_rx_dma() - Stop DMA receive
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/linux-6.14.4/drivers/i2c/busses/
Di2c-imx-lpi2c.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/dma-mapping.h>
28 #define DRIVER_NAME "imx-lpi2c"
30 #define LPI2C_PARAM 0x04 /* i2c RX/TX FIFO size */
34 #define LPI2C_MDER 0x1C /* i2c DMA enable */
43 #define LPI2C_MTDR 0x60 /* i2c master TX data register */
49 #define LPI2C_SDER 0x11C /* i2c target DMA enable */
186 struct lpi2c_imx_dma *dma; member
193 writel(enable, lpi2c_imx->base + LPI2C_MIER); in lpi2c_imx_intctrl()
202 temp = readl(lpi2c_imx->base + LPI2C_MSR); in lpi2c_imx_bus_busy()
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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <[email protected]>
11 - Giuseppe Cavallaro <[email protected]>
12 - Jose Abreu <[email protected]>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/linux-6.14.4/Documentation/networking/device_drivers/ethernet/stmicro/
Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
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/linux-6.14.4/drivers/net/wireless/intel/iwlegacy/
Dprph.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
106 * processor is sleeping (e.g. for periodic power-saving shutdowns of radio).
113 * This bootstrap program loads (via PCI busmaster DMA) instructions and data
119 * The uCode used for open-source drivers includes two programs:
121 * 1) Initialization -- performs hardware calibration and sets up some
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/linux-6.14.4/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Ddma.h4 * Permission to use, copy, modify, and/or distribute this software for any
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
25 #define DMA_TX 1 /* TX direction for DMA */
26 #define DMA_RX 2 /* RX direction for DMA */
28 /* DMA structure:
29 * support two DMA engines: 32 bits address or 64 bit addressing
30 * basic DMA register set is per channel(transmit or receive)
45 /* dma registers per channel(xmt or rcv) */
49 u32 addrlow; /* desc ring base address low 32-bits (8K aligned) */
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/linux-6.14.4/drivers/mailbox/
Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
25 * descriptors from the tx and rx ring, thus processing one response at a time.
41 #include <linux/mailbox/brcm-message.h>
43 #include <linux/dma-direction.h>
44 #include <linux/dma-mapping.h>
52 /* # entries in PDC dma ring */
73 #define PREVTXD(i, max_mask) TXD((i) - 1, (max_mask))
75 #define PREVRXD(i, max_mask) RXD((i) - 1, (max_mask))
76 #define NTXDACTIVE(h, t, max_mask) TXD((t) - (h), (max_mask))
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/linux-6.14.4/sound/soc/fsl/
Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
57 #define TX 1 macro
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
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/linux-6.14.4/drivers/net/wireless/broadcom/b43/
Ddma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 DMA ringbuffer and descriptor allocation/management
18 #include "dma.h"
23 #include <linux/dma-mapping.h>
32 /* Required number of TX DMA slots per TX frame.
37 static u32 b43_dma_address(struct b43_dma *dma, dma_addr_t dmaaddr, in b43_dma_address() argument
45 if (dma->translation_in_low) { in b43_dma_address()
47 addr |= dma->translation; in b43_dma_address()
52 if (!dma->translation_in_low) { in b43_dma_address()
54 addr |= dma->translation; in b43_dma_address()
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/linux-6.14.4/drivers/spi/
Dspi-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/dma-mapping.h>
17 #include <linux/platform_data/spi-s3c64xx.h>
27 /* Registers and bit-fields */
112 #define FIFO_LVL_MASK(i) ((i)->port_conf->fifo_lvl_mask[i->port_id])
114 (1 << (i)->port_conf->tx_st_done)) ? 1 : 0)
115 #define TX_FIFO_LVL(v, sdd) (((v) & (sdd)->tx_fifomask) >> \
116 __ffs((sdd)->tx_fifomask))
117 #define RX_FIFO_LVL(v, sdd) (((v) & (sdd)->rx_fifomask) >> \
118 __ffs((sdd)->rx_fifomask))
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