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/aosp_15_r20/external/llvm/test/Transforms/BDCE/
H A Dbasic.ll9 %call = tail call signext i32 @foo(i32 signext 5) #0
12 %call1 = tail call signext i32 @foo(i32 signext 3) #0
15 %call4 = tail call signext i32 @foo(i32 signext 2) #0
18 %call7 = tail call signext i32 @foo(i32 signext 1) #0
21 %call10 = tail call signext i32 @foo(i32 signext 0) #0
24 %call13 = tail call signext i32 @foo(i32 signext 4) #0
31 ; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
32 ; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
33 ; CHECK: tail call signext i32 @foo(i32 signext 2)
34 ; CHECK: tail call signext i32 @foo(i32 signext 1)
[all …]
/aosp_15_r20/external/llvm/test/Transforms/LoopUnroll/
H A Dignore-annotation-intrinsic-cost.ll27 %annot.0 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
28 %annot.1 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
29 %annot.2 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
30 %annot.3 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
31 %annot.4 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
32 %annot.5 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
33 %annot.6 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
34 %annot.7 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
35 %annot.8 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
36 %annot.9 = tail call i32 @llvm.annotation.i32(i32 %i.01, i8* null, i8* null, i32 0)
[all …]
/aosp_15_r20/external/llvm/test/CodeGen/ARM/
H A Dthumb-big-stack.ll145 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
147 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
149 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
151 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
153 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
155 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
157 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
159 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
161 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
163 …tail call void asm sideeffect "", "~{q0}{q1}{q2}{q3}{q4}{q5}{q6}{q7}{q8}{q9}{q10}{q11}{q12}{q13}{q…
[all …]
/aosp_15_r20/external/llvm/test/CodeGen/AArch64/
H A Dfastcc.ll1 …triple=aarch64-none-linux-gnu -disable-fp-elim -tailcallopt | FileCheck %s -check-prefix CHECK-TAIL
3 …linux-gnu -disable-fp-elim -tailcallopt -aarch64-redzone | FileCheck %s -check-prefix CHECK-TAIL-RZ
14 ; CHECK-TAIL-LABEL: func_stack0:
15 ; CHECK-TAIL: sub sp, sp, #48
16 ; CHECK-TAIL-NEXT: stp x29, x30, [sp, #32]
17 ; CHECK-TAIL-NEXT: add x29, sp, #32
18 ; CHECK-TAIL: str w{{[0-9]+}}, [sp]
25 ; CHECK-TAIL: bl func_stack8
26 ; CHECK-TAIL: sub sp, sp, #16
34 ; CHECK-TAIL: bl func_stack32
[all …]
/aosp_15_r20/external/llvm/test/Analysis/BasicAA/
H A Dcs-cs.ll41 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
42 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
48 ; CHECK: Both ModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8*…
49 ; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8*…
50 ; CHECK: Both ModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8*…
51 ; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8*…
52 ; CHECK: Both ModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, …
53 ; CHECK: Both ModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, …
57 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
58 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
[all …]
/aosp_15_r20/external/grpc-grpc-java/netty/src/test/java/io/grpc/netty/
H A DNettyAdaptiveCumulatorTest.java202 private ByteBuf tail; field in NettyAdaptiveCumulatorTest.ShouldComposeTests
209 tail = ByteBufUtil.writeAscii(alloc, tailData); in setUp()
211 // Note that addFlattenedComponents() will not add a new component when tail is not readable. in setUp()
212 composite.addFlattenedComponents(true, tail); in setUp()
230 assume().that(tail.readableBytes() + in.readableBytes()).isAtLeast(composeMinSize); in shouldCompose_composeMinSizeReached()
237 assume().that(tail.readableBytes() + in.readableBytes()).isLessThan(composeMinSize); in shouldCompose_composeMinSizeNotReached()
248 private static final String TAIL_DATA_READABLE = "tail";
254 private static final String EXPECTED_TAIL_DATA = "tail+incoming";
259 * <p>Test cases when the cumulation contains components, other than tail, and could be
269 // so it's not added to the composite byte buf. The tail is added as the first component. in params()
[all …]
/aosp_15_r20/external/llvm/test/CodeGen/X86/
H A Dswitch.ll14 bb0: tail call void @g(i32 0) br label %return
15 bb1: tail call void @g(i32 1) br label %return
16 bb2: tail call void @g(i32 1) br label %return
42 bb0: tail call void @g(i32 0) br label %return
43 bb1: tail call void @g(i32 1) br label %return
44 bb2: tail call void @g(i32 1) br label %return
61 bb0: tail call void @g(i32 0) br label %return
62 bb1: tail call void @g(i32 1) br label %return
63 bb2: tail call void @g(i32 1) br label %return
87 bb0: tail call void @g(i32 0) br label %return
[all …]
/aosp_15_r20/external/llvm/test/Transforms/InstCombine/
H A Dx86-vector-shifts.ll13 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %v, i32 0)
22 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %v, i32 15)
31 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %v, i32 64)
39 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %v, i32 0)
48 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %v, i32 15)
57 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %v, i32 64)
65 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 0)
74 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 15)
83 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 64)
91 %1 = tail call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %v, i32 0)
[all …]
/aosp_15_r20/prebuilts/rust/linux-x86/1.80.1/lib/rustlib/src/rust/library/std/src/sync/mpmc/
H A Darray.rs61 /// The tail of the channel.
67 /// Messages are pushed into the tail of the channel.
68 tail: CachePadded<AtomicUsize>, field
79 /// If this bit is set in the tail, that means the channel is disconnected.
100 // Tail is initialized to `{ lap: 0, mark: 0, index: 0 }`. in with_capacity()
101 let tail = 0; in with_capacity() localVariable
118 tail: CachePadded::new(AtomicUsize::new(tail)), in with_capacity()
127 let mut tail = self.tail.load(Ordering::Relaxed); in start_send() localVariable
131 if tail & self.mark_bit != 0 { in start_send()
137 // Deconstruct the tail. in start_send()
[all …]
H A Dlist.rs32 // * If set in tail, indicates that the channel is disconnected.
148 /// The tail of the channel.
149 tail: CachePadded<Position<T>>, field
166 tail: CachePadded::new(Position { in new()
178 let mut tail = self.tail.index.load(Ordering::Acquire); in start_send() localVariable
179 let mut block = self.tail.block.load(Ordering::Acquire); in start_send()
184 if tail & MARK_BIT != 0 { in start_send()
190 let offset = (tail >> SHIFT) % LAP; in start_send()
195 tail = self.tail.index.load(Ordering::Acquire); in start_send()
196 block = self.tail.block.load(Ordering::Acquire); in start_send()
[all …]
/aosp_15_r20/prebuilts/rust/linux-x86/1.81.0.u1/lib/rustlib/src/rust/library/std/src/sync/mpmc/
H A Darray.rs61 /// The tail of the channel.
67 /// Messages are pushed into the tail of the channel.
68 tail: CachePadded<AtomicUsize>, field
79 /// If this bit is set in the tail, that means the channel is disconnected.
100 // Tail is initialized to `{ lap: 0, mark: 0, index: 0 }`. in with_capacity()
101 let tail = 0; in with_capacity() localVariable
118 tail: CachePadded::new(AtomicUsize::new(tail)), in with_capacity()
127 let mut tail = self.tail.load(Ordering::Relaxed); in start_send() localVariable
131 if tail & self.mark_bit != 0 { in start_send()
137 // Deconstruct the tail. in start_send()
[all …]
H A Dlist.rs32 // * If set in tail, indicates that the channel is disconnected.
148 /// The tail of the channel.
149 tail: CachePadded<Position<T>>, field
166 tail: CachePadded::new(Position { in new()
178 let mut tail = self.tail.index.load(Ordering::Acquire); in start_send() localVariable
179 let mut block = self.tail.block.load(Ordering::Acquire); in start_send()
184 if tail & MARK_BIT != 0 { in start_send()
190 let offset = (tail >> SHIFT) % LAP; in start_send()
195 tail = self.tail.index.load(Ordering::Acquire); in start_send()
196 block = self.tail.block.load(Ordering::Acquire); in start_send()
[all …]
/aosp_15_r20/prebuilts/rust/linux-musl-x86/1.81.0/lib/rustlib/src/rust/library/std/src/sync/mpmc/
H A Darray.rs61 /// The tail of the channel.
67 /// Messages are pushed into the tail of the channel.
68 tail: CachePadded<AtomicUsize>, field
79 /// If this bit is set in the tail, that means the channel is disconnected.
100 // Tail is initialized to `{ lap: 0, mark: 0, index: 0 }`. in with_capacity()
101 let tail = 0; in with_capacity() localVariable
118 tail: CachePadded::new(AtomicUsize::new(tail)), in with_capacity()
127 let mut tail = self.tail.load(Ordering::Relaxed); in start_send() localVariable
131 if tail & self.mark_bit != 0 { in start_send()
137 // Deconstruct the tail. in start_send()
[all …]
H A Dlist.rs32 // * If set in tail, indicates that the channel is disconnected.
148 /// The tail of the channel.
149 tail: CachePadded<Position<T>>, field
166 tail: CachePadded::new(Position { in new()
178 let mut tail = self.tail.index.load(Ordering::Acquire); in start_send() localVariable
179 let mut block = self.tail.block.load(Ordering::Acquire); in start_send()
184 if tail & MARK_BIT != 0 { in start_send()
190 let offset = (tail >> SHIFT) % LAP; in start_send()
195 tail = self.tail.index.load(Ordering::Acquire); in start_send()
196 block = self.tail.block.load(Ordering::Acquire); in start_send()
[all …]
/aosp_15_r20/external/llvm/test/CodeGen/Hexagon/
H A Deliminate-pred-spill.ll51 %20 = tail call <1024 x i1> @llvm.hexagon.V6.vgtb.128B(<32 x i32> %2, <32 x i32> %11)
52 …%21 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %20, <32 x i32> %11, <32 x i32> …
53 …%22 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %20, <32 x i32> %2, <32 x i32> %…
54 …%23 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %20, <32 x i32> undef, <32 x i32…
55 …%24 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %20, <32 x i32> %12, <32 x i32> …
56 %25 = tail call <1024 x i1> @llvm.hexagon.V6.vgtb.128B(<32 x i32> %7, <32 x i32> %15)
57 …%26 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %25, <32 x i32> %15, <32 x i32> …
58 …%27 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %25, <32 x i32> %7, <32 x i32> %…
59 …%28 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %25, <32 x i32> %16, <32 x i32> …
60 …%29 = tail call <32 x i32> @llvm.hexagon.V6.vmux.128B(<1024 x i1> %25, <32 x i32> %8, <32 x i32> %…
[all …]
/aosp_15_r20/prebuilts/rust/linux-musl-x86/1.80.1/lib/rustlib/src/rust/library/std/src/sync/mpmc/
H A Darray.rs61 /// The tail of the channel.
67 /// Messages are pushed into the tail of the channel.
68 tail: CachePadded<AtomicUsize>, field
79 /// If this bit is set in the tail, that means the channel is disconnected.
100 // Tail is initialized to `{ lap: 0, mark: 0, index: 0 }`. in with_capacity()
101 let tail = 0; in with_capacity() localVariable
118 tail: CachePadded::new(AtomicUsize::new(tail)), in with_capacity()
127 let mut tail = self.tail.load(Ordering::Relaxed); in start_send() localVariable
131 if tail & self.mark_bit != 0 { in start_send()
137 // Deconstruct the tail. in start_send()
[all …]
H A Dlist.rs32 // * If set in tail, indicates that the channel is disconnected.
148 /// The tail of the channel.
149 tail: CachePadded<Position<T>>, field
166 tail: CachePadded::new(Position { in new()
178 let mut tail = self.tail.index.load(Ordering::Acquire); in start_send() localVariable
179 let mut block = self.tail.block.load(Ordering::Acquire); in start_send()
184 if tail & MARK_BIT != 0 { in start_send()
190 let offset = (tail >> SHIFT) % LAP; in start_send()
195 tail = self.tail.index.load(Ordering::Acquire); in start_send()
196 block = self.tail.block.load(Ordering::Acquire); in start_send()
[all …]
/aosp_15_r20/prebuilts/rust/linux-x86/1.81.0/lib/rustlib/src/rust/library/std/src/sync/mpmc/
H A Darray.rs61 /// The tail of the channel.
67 /// Messages are pushed into the tail of the channel.
68 tail: CachePadded<AtomicUsize>, field
79 /// If this bit is set in the tail, that means the channel is disconnected.
100 // Tail is initialized to `{ lap: 0, mark: 0, index: 0 }`. in with_capacity()
101 let tail = 0; in with_capacity() localVariable
118 tail: CachePadded::new(AtomicUsize::new(tail)), in with_capacity()
127 let mut tail = self.tail.load(Ordering::Relaxed); in start_send() localVariable
131 if tail & self.mark_bit != 0 { in start_send()
137 // Deconstruct the tail. in start_send()
[all …]
H A Dlist.rs32 // * If set in tail, indicates that the channel is disconnected.
148 /// The tail of the channel.
149 tail: CachePadded<Position<T>>, field
166 tail: CachePadded::new(Position { in new()
178 let mut tail = self.tail.index.load(Ordering::Acquire); in start_send() localVariable
179 let mut block = self.tail.block.load(Ordering::Acquire); in start_send()
184 if tail & MARK_BIT != 0 { in start_send()
190 let offset = (tail >> SHIFT) % LAP; in start_send()
195 tail = self.tail.index.load(Ordering::Acquire); in start_send()
196 block = self.tail.block.load(Ordering::Acquire); in start_send()
[all …]
/aosp_15_r20/external/okio/okio/src/commonMain/kotlin/okio/internal/
H A DBuffer.kt282 // Omit the tail if it's still writable. in commonCompleteSegmentByteCount()
283 val tail = head!!.prev!! in commonCompleteSegmentByteCount() constant
284 if (tail.limit < Segment.SIZE && tail.owner) { in commonCompleteSegmentByteCount()
285 result -= (tail.limit - tail.pos).toLong() in commonCompleteSegmentByteCount()
525 val tail = writableSegment(width) in commonWriteDecimalLong() constant
526 val data = tail.data in commonWriteDecimalLong()
527 var pos = tail.limit + width // We write backwards from right to left. in commonWriteDecimalLong()
537 tail.limit += width in commonWriteDecimalLong()
571 val tail = writableSegment(width) in commonWriteHexadecimalUnsignedLong() constant
572 val data = tail.data in commonWriteHexadecimalUnsignedLong()
[all …]
/aosp_15_r20/external/marisa-trie/tests/
H A Dtrie-test.cc9 #include <marisa/grimoire/trie/tail.h>
233 marisa::grimoire::trie::Tail tail; in TestTextTail() local
236 tail.build(entries, &offsets, MARISA_TEXT_TAIL); in TestTextTail()
238 ASSERT(tail.mode() == MARISA_TEXT_TAIL); in TestTextTail()
239 ASSERT(tail.size() == 0); in TestTextTail()
240 ASSERT(tail.empty()); in TestTextTail()
241 ASSERT(tail.total_size() == tail.size()); in TestTextTail()
242 ASSERT(tail.io_size() == (sizeof(marisa::UInt64) * 6)); in TestTextTail()
250 tail.build(entries, &offsets, MARISA_TEXT_TAIL); in TestTextTail()
252 ASSERT(tail.mode() == MARISA_TEXT_TAIL); in TestTextTail()
[all …]
/aosp_15_r20/external/rust/android-crates-io/crates/crossbeam-queue/src/
Darray_queue.rs19 /// If the stamp equals the tail, this node will be next written to. If it equals head + 1,
59 /// The tail of the queue.
64 /// Elements are pushed into the tail of the queue.
65 tail: CachePadded<AtomicUsize>, field
101 // Tail is initialized to `{ lap: 0, index: 0 }`. in new()
103 let tail = 0; in new() localVariable
125 tail: CachePadded::new(AtomicUsize::new(tail)), in new()
134 let mut tail = self.tail.load(Ordering::Relaxed); in push_or_else() localVariable
137 // Deconstruct the tail. in push_or_else()
138 let index = tail & (self.one_lap - 1); in push_or_else()
[all …]
/aosp_15_r20/external/libwebsockets/include/libwebsockets/
H A Dlws-ring.h43 * automatically called for elements with no tail behind them, ie, elements
65 * consumption into one or two memcpy()s depending on if the head or tail
69 * an API to inform it when the "oldest" tail has moved on. You can give
70 * NULL where-ever an api asks for a tail pointer, and it will use an internal
71 * single tail pointer for convenience.
73 * The "oldest tail", which is the only tail if you give it NULL instead of
74 * some other tail, is used to track which elements in the ringbuffer are
89 * oldest tail moving beyond it
95 * retired from the ringbuffer after the oldest tail has gone past it, and for
128 * \param tail: a pointer to the tail struct to use, or NULL for single tail
[all …]
/aosp_15_r20/external/rust/android-crates-io/crates/crossbeam-channel/src/flavors/
Dlist.rs40 // * If set in tail, indicates that the channel is disconnected.
161 /// The tail of the channel.
162 tail: CachePadded<Position<T>>, field
179 tail: CachePadded::new(Position { in new()
201 let mut tail = self.tail.index.load(Ordering::Acquire); in start_send() localVariable
202 let mut block = self.tail.block.load(Ordering::Acquire); in start_send()
207 if tail & MARK_BIT != 0 { in start_send()
213 let offset = (tail >> SHIFT) % LAP; in start_send()
218 tail = self.tail.index.load(Ordering::Acquire); in start_send()
219 block = self.tail.block.load(Ordering::Acquire); in start_send()
[all …]
/aosp_15_r20/frameworks/rs/driver/runtime/arch/
H A Dasimd.ll109 …%1 = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %value, <4 x float> %high) no…
110 …%2 = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %1, <4 x float> %low) nounwin…
115 %_high = tail call <4 x float> @smear_4f(float %high) nounwind readnone
116 %_low = tail call <4 x float> @smear_4f(float %low) nounwind readnone
117 …%out = tail call <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %value, <4 x float> %_low, <4 x float>…
125 …%a = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %_value, <4 x float> %_high) …
126 …%b = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %a, <4 x float> %_low) nounwi…
133 %_high = tail call <4 x float> @smear_4f(float %high) nounwind readnone
134 %_low = tail call <4 x float> @smear_4f(float %low) nounwind readnone
135 …%a = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %_value, <4 x float> %_high) …
[all …]

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