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/linux-6.14.4/arch/arm64/boot/dts/st/
Dstm32mp251.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
9 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
10 #include <dt-bindings/phy/phy.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
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Dstm32mp255.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 compatible = "st,stm32mp25-vdec";
13 clocks = <&rcc CK_BUS_VDEC>;
14 access-controllers = <&rifsc 89>;
19 compatible = "st,stm32mp25-venc";
22 clocks = <&rcc CK_BUS_VENC>;
23 access-controllers = <&rifsc 90>;
Dstm32mp253.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&CPU_PD1>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 CPU_PD1: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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Dstm32mp257f-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
13 #include "stm32mp25-pinctrl.dtsi"
14 #include "stm32mp25xxai-pinctrl.dtsi"
17 model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
18 compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
27 stdout-path = "serial0:115200n8";
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dst,stm32mp25-combophy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32MP25 USB3/PCIe COMBOPHY
10 - Christian Bruel <[email protected]>
18 const: st,stm32mp25-combophy
23 "#phy-cells":
29 - description: apb Bus clock mandatory to access registers.
30 - description: ker Internal RCC reference clock for USB3 or PCIe
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/linux-6.14.4/Documentation/devicetree/bindings/media/
Dst,stm32mp25-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32mp25-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Alain Volmat <[email protected]>
19 - st,stm32mp25-csi
30 clock-names:
32 - const: pclk
33 - const: txesc
34 - const: csi2phy
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Dst,stm32-dcmipp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugues Fruchet <[email protected]>
11 - Alain Volmat <[email protected]>
16 - st,stm32mp13-dcmipp
17 - st,stm32mp25-dcmipp
27 - description: bus clock
28 - description: csi clock
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/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dst,stm32mp25-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32MP25 Reset Clock Controller
10 - Gabriel Fernandez <[email protected]>
13 The RCC hardware block is both a reset and a clock controller.
14 RCC makes also power management (resume/supend).
17 include/dt-bindings/clock/st,stm32mp25-rcc.h
18 include/dt-bindings/reset/st,stm32mp25-rcc.h
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/linux-6.14.4/Documentation/devicetree/bindings/display/
Dst,stm32mp25-lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raphael Gallais-Pou <raphael.gallais-[email protected]>
11 - Yannick Fertre <[email protected]>
15 LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC)
19 - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input
21 - LVDS PHY: parallelize the data and drives the LVDS data lanes
22 - LVDS wrapper: handles top-level settings
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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <[email protected]>
12 - Christophe Roullier <[email protected]>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
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/linux-6.14.4/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <[email protected]>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
18 - st,stm32mp25-rtc
27 clock-names:
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/linux-6.14.4/Documentation/devicetree/bindings/i2c/
Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pierre-Yves MORDRET <pierre-[email protected]>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
21 - st,stm32mp15-i2c
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dst,stm32-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <[email protected]>
19 - st,stm32h7-i2s
20 - st,stm32mp25-i2s
22 "#sound-dai-cells":
30 - description: clock feeding the peripheral bus interface.
31 - description: clock feeding the internal clock generator.
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Dst,stm32-sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <[email protected]>
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
21 - st,stm32f4-sai
22 - st,stm32h7-sai
23 - st,stm32mp25-sai
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/linux-6.14.4/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-dma3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 described in "#dma-cells" property description below, using a three-cell
26 - Amelie Delaunay <[email protected]>
29 - $ref: /schemas/dma/dma-controller.yaml#
33 const: st,stm32mp25-dma3
42 Should contain all of the per-channel DMA interrupts in ascending order
51 power-domains:
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/linux-6.14.4/Documentation/devicetree/bindings/mtd/
Dst,stm32-fmc2-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <[email protected]>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc
28 - description: tx DMA channel
29 - description: rx DMA channel
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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and
13 from 4 to 32-bit data size.
16 - Erwan Leray <[email protected]>
17 - Fabrice Gasnier <[email protected]>
20 - $ref: spi-controller.yaml#
25 - st,stm32f4-spi
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/linux-6.14.4/Documentation/devicetree/bindings/arm/stm32/
Dst,stm32-syscon.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <[email protected]>
11 - Christophe Roullier <[email protected]>
16 - items:
17 - enum:
18 - st,stm32-power-config
19 - st,stm32-syscfg
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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dst,stm32-fmc2-ebi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
22 - Christophe Kerello <[email protected]>
27 - st,stm32mp1-fmc2-ebi
28 - st,stm32mp25-fmc2-ebi
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/linux-6.14.4/Documentation/devicetree/bindings/rng/
Dst,stm32-rng.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <[email protected]>
19 - st,stm32-rng
20 - st,stm32mp13-rng
21 - st,stm32mp25-rng
30 clock-names:
32 - const: core
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <[email protected]>
11 - Ulf Hansson <[email protected]>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
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/linux-6.14.4/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
37 *------------------------------------------
39 *------------------------------------------
41 *------------------------------------------
43 *------------------------------------------
45 *------------------------------------------
47 *------------------------------------------
74 * ---------------------------------------------------------------------------
75 *| MII | - | eth-ck | n/a | n/a |
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/linux-6.14.4/drivers/clk/stm32/
Dclk-stm32mp25.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
8 #include <linux/clk-provider.h>
12 #include "clk-stm32-core.h"
13 #include "reset-stm32.h"
16 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
17 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
20 #define SECF_NONE -1
523 /* CSI-HOST */
539 /* CSI-PHY */
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/linux-6.14.4/drivers/gpu/drm/stm/
Dlvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
4 * Author(s): Raphaël GALLAIS-POU <raphael.gallais-[email protected]> for STMicroelectronics.
16 #include <linux/clk-provider.h>
19 #include <linux/media-bus-format.h>
62 #define CR_LK1POL GENMASK(20, 16) /* Link-1 output Polarity */
63 #define CR_LK2POL GENMASK(25, 21) /* Link-2 output Polarity */
96 #define PHY_PLLCR1_EN_SD BIT(1) /* LVDS PHY PLL sigma-delta signal enable */
120 * ,--------. ,--------. ,--------. ,--------. ,---------.
123 * `--------' `--------' `--------' `--------' `---------'
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