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Searched +full:stm32h7 +full:- +full:spi (Results 1 – 14 of 14) sorted by relevance

/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <[email protected]>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32h750i-art-pi.dts2 * Copyright 2021 - Dillon Min <[email protected]>
4 * This file is dual-licensed: you can use it either under the terms
42 * For art-pi board resources, you can refer to link:
43 * https://art-pi.gitee.io/website/
46 /dts-v1/;
48 #include "stm32h7-pinctrl.dtsi"
49 #include <dt-bindings/interrupt-controller/irq.h>
50 #include <dt-bindings/gpio/gpio.h>
53 model = "RT-Thread STM32H750i-ART-PI board";
54 compatible = "st,stm32h750i-art-pi", "st,stm32h750";
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/linux-6.14.4/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <[email protected]>
11 - Olivier Moysan <[email protected]>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
20 It features up to 8 serial digital interfaces (SPI or Manchester) and
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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 SPI Controller
10 The STM32 SPI controller is used to communicate with external devices using
11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and
13 from 4 to 32-bit data size.
16 - Erwan Leray <[email protected]>
17 - Fabrice Gasnier <[email protected]>
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Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <[email protected]>
27 - minimum: 0
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dst,stm32-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 SPI/I2S Controller
10 - Olivier Moysan <[email protected]>
13 The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.
14 Only some SPI instances support I2S.
19 - st,stm32h7-i2s
20 - st,stm32mp25-i2s
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/linux-6.14.4/arch/arm64/boot/dts/st/
Dstm32mp251.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
9 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
10 #include <dt-bindings/phy/phy.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
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/linux-6.14.4/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
21 #include <linux/spi/spi.h>
25 /* STM32F4/7 SPI registers */
81 /* STM32F4 SPI Baud Rate min/max divisor */
85 /* STM32H7 SPI registers */
157 /* STM32MP25 SPI registers bit fields */
171 /* STM32H7 SPI Master Baud Rate min/max divisor */
175 /* STM32H7 SPI Communication mode */
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/linux-6.14.4/drivers/iio/adc/
Dstm32-dfsdm-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
23 #include "stm32-dfsdm.h"
26 * struct stm32_dfsdm_dev_data - DFSDM compatible configuration data
96 unsigned int spi_clk_out_div; /* SPI clkout divider value */
113 ret = clk_prepare_enable(priv->clk); in stm32_dfsdm_clk_prepare_enable()
114 if (ret || !priv->aclk) in stm32_dfsdm_clk_prepare_enable()
117 ret = clk_prepare_enable(priv->aclk); in stm32_dfsdm_clk_prepare_enable()
119 clk_disable_unprepare(priv->clk); in stm32_dfsdm_clk_prepare_enable()
128 clk_disable_unprepare(priv->aclk); in stm32_dfsdm_clk_disable_unprepare()
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/linux-6.14.4/sound/soc/stm/
Dstm32_adfsdm.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
18 #include <linux/iio/adc/stm32-dfsdm-adc.h>
23 #define STM32_ADFSDM_DRV_NAME "stm32-adfsdm"
65 mutex_lock(&priv->lock); in stm32_adfsdm_shutdown()
66 if (priv->iio_active) { in stm32_adfsdm_shutdown()
67 iio_channel_stop_all_cb(priv->iio_cb); in stm32_adfsdm_shutdown()
68 priv->iio_active = false; in stm32_adfsdm_shutdown()
70 mutex_unlock(&priv->lock); in stm32_adfsdm_shutdown()
79 mutex_lock(&priv->lock); in stm32_adfsdm_dai_prepare()
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Dstm32_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
11 #include <linux/clk-provider.h>
136 #define I2S_CGFR_I2SDIV_MAX ((1 << (I2S_CGFR_I2SDIV_BIT_H -\
137 I2S_CGFR_I2SDIV_SHIFT)) - 1)
198 #define STM32_I2S_IS_MASTER(x) ((x)->ms_flg == I2S_MS_MASTER)
199 #define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE)
208 * struct stm32_i2s_data - private data of I2S
266 * struct stm32_i2s_conf - I2S configuration
303 dev_dbg(&i2s->pdev->dev, "Divider: 2*%d(div)+%d(odd) = %d\n", in stm32_i2s_calc_clk_div()
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/linux-6.14.4/drivers/clk/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
55 depends on SPI
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 multi-function device has one fixed-rate oscillator, clocked
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
237 provides read-only PLLs, derived from the main crystal clock (which
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