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/linux-6.14.4/Documentation/devicetree/bindings/input/
Drotary-encoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/rotary-encoder.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <[email protected]>
13 See Documentation/input/devices/rotary-encoder.rst for more information.
17 const: rotary-encoder
28 rotary-encoder,steps:
32 Number of steps in a full turnaround of the
36 rotary-encoder,relative-axis:
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/linux-6.14.4/drivers/input/misc/
Drotary_encoder.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * See file:Documentation/input/devices/rotary-encoder.rst for more information
26 #define DRV_NAME "rotary-encoder"
38 u32 steps; member
51 signed char dir; /* 1 - clockwise, -1 - CCW */
61 for (i = 0; i < encoder->gpios->ndescs; ++i) { in rotary_encoder_get_state()
62 int val = gpiod_get_value_cansleep(encoder->gpios->desc[i]); in rotary_encoder_get_state()
65 if (encoder->encoding == ROTENC_GRAY && ret & 1) in rotary_encoder_get_state()
76 if (encoder->relative_axis) { in rotary_encoder_report_event()
77 input_report_rel(encoder->input, in rotary_encoder_report_event()
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/linux-6.14.4/include/linux/
Ddim.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
15 /* Number of DIM profiles and period mode. */
33 ((ref) && (((100UL * abs((val) - (ref))) / (ref)) > 10))
37 * Take wrap-around and variable size into consideration.
39 #define BIT_GAP(bits, end, start) ((((end) - (start)) + BIT_ULL(bits)) \
40 & (BIT_ULL(bits) - 1))
43 * struct dim_cq_moder - Structure for CQ moderation values.
49 * @cq_period_mode: CQ period count mode (from CQE/EQE)
68 * struct dim_irq_moder - Structure for irq moderation information.
73 * @dim_rx_mode: Rx DIM period count mode: CQE or EQE
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/linux-6.14.4/Documentation/input/devices/
Drotary-encoder.rst2 rotary-encoder - a generic driver for GPIO connected devices
8 --------
11 peripherals with two wires. The outputs are phase-shifted by 90 degrees
16 a stable state with both outputs high (half-period mode) and some have
17 a stable state in all steps (quarter-period mode).
33 |<-------->|
36 |<-->|
37 one step (half-period mode)
40 one step (quarter-period mode)
47 ----------------------
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/linux-6.14.4/Documentation/trace/coresight/
Dcoresight-config.rst1 .. SPDX-License-Identifier: GPL-2.0
14 programming of the CoreSight system with pre-defined configurations that
17 Many CoreSight components can be programmed in complex ways - especially ETMs.
30 --------
41 accesses in the driver - the resource usage and parameter descriptions
67 system - which is described below.
74 --------------
82 enabled on a class of devices - i.e. any ETMv4, or specific devices, e.g. a
110 The following steps take place in the operation of a configuration.
118 perf record -e cs_etm/autofdo/ myapp
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/linux-6.14.4/tools/memory-model/Documentation/
Dsimple.txt2 memory-ordering lives simple, as is necessary for those whose domain
3 is complex. After all, there are bugs other than memory-ordering bugs,
4 and the time spent gaining memory-ordering knowledge is not available
5 for gaining domain knowledge. Furthermore Linux-kernel memory model
15 of MMIO-based device drivers will often need to use mb(), rmb(), and
22 Single-threaded code
25 In single-threaded code, there is no reordering, at least assuming
32 In the general case, you will need to take explicit steps to ensure that
38 this lock at a given time, your code will be executed single-threaded.
56 surprisingly hard to correctly code production-quality lock acquisition
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/linux-6.14.4/drivers/mtd/nand/raw/
Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <[email protected]>
10 #include <linux/dma-mapping.h>
34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc()
213 oobregion->offset = SKIP_SPARE_BYTES; in tegra_nand_ooblayout_rs_ecc()
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Dnand_base.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner ([email protected])
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
52 int lastpage = (mtd->erasesize / mtd->writesize) - 1; in nand_pairing_dist3_get_info()
59 info->group = 0; in nand_pairing_dist3_get_info()
60 info->pair = (page + 1) / 2; in nand_pairing_dist3_get_info()
62 info->group = 1; in nand_pairing_dist3_get_info()
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/linux-6.14.4/drivers/memory/tegra/
Dtegra210-emc-cc-r21021.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
14 #include "tegra210-emc.h"
15 #include "tegra210-mc.h"
21 #define STEPS (1 << 1) macro
36 #define emc_dbg(emc, flags, ...) dev_dbg(emc->dev, __VA_ARGS__)
53 * PTFV defines - basically just indexes into the per table PTFV array.
78 ({ next->ptfv_list[(dev)] = \
79 next->ptfv_list[(dev)] / \
80 next->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; })
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/linux-6.14.4/Documentation/hwmon/
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <[email protected]>
25 - Ported to 2.6 by Eric J. Bowersox <[email protected]>
26 - Adapted to 2.6.20 by Carsten Emde <[email protected]>
27 - Modified for mainline integration by Hans J. Koch <[email protected]>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
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/linux-6.14.4/sound/soc/meson/
Daxg-pdm.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
12 #include <sound/soc-dai.h>
53 #define PDM_CHAN_CTRL_POINTER_MAX ((1 << PDM_CHAN_CTRL_POINTER_WIDTH) - 1)
71 unsigned int steps; member
77 unsigned int steps; member
134 axg_pdm_enable(priv->map); in axg_pdm_trigger()
140 axg_pdm_disable(priv->map); in axg_pdm_trigger()
144 return -EINVAL; in axg_pdm_trigger()
150 const struct axg_pdm_filters *filters = priv->cfg->filters; in axg_pdm_get_os()
151 unsigned int os = filters->hcic.ds; in axg_pdm_get_os()
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/linux-6.14.4/drivers/scsi/arm/
Dfas216.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2000 Russell King
101 /* Transfer period step (write) */
123 #define CLKF_F37MHZ 0x00 /* 35.01 - 40 MHz */
125 #define CLKF_F12MHZ 0x03 /* 10.01 - 15 MHz */
126 #define CLKF_F17MHZ 0x04 /* 15.01 - 20 MHz */
127 #define CLKF_F22MHZ 0x05 /* 20.01 - 25 MHz */
128 #define CLKF_F27MHZ 0x06 /* 25.01 - 30 MHz */
129 #define CLKF_F32MHZ 0x07 /* 30.01 - 35 MHz */
172 PHASE_SELSTEPS, /* selection with command steps */
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/linux-6.14.4/drivers/media/i2c/
Ddw9714.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2015--2017 Intel Corporation.
9 #include <media/v4l2-ctrls.h>
10 #include <media/v4l2-device.h>
11 #include <media/v4l2-event.h>
22 * Keep this value power of 2, so the control steps can be
24 * number of control steps.
29 * S[3:2] = 0x00, codes per step for "Linear Slope Control"
30 * S[1:0] = 0x00, step period
45 return container_of(ctrl->handler, struct dw9714_device, ctrls_vcm); in to_dw9714_vcm()
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/linux-6.14.4/kernel/sched/
Dpelt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Per Entity Load Tracking (PELT)
29 * val * y^n, where y^32 ~= 0.5 (~1 scheduling period)
38 /* after bounds checking we can collapse to 32-bit */ in decay_load()
42 * As y^PERIOD = 1/2, we can combine in decay_load()
43 * y^n = 1/2^(n/PERIOD) * y^(n%PERIOD) in decay_load()
44 * With a look-up table which covers y^n (n<PERIOD) in decay_load()
67 * p-1 in __accumulate_pelt_segments()
72 * = 1024 ( \Sum y^n - \Sum y^n - y^0 ) in __accumulate_pelt_segments()
75 c2 = LOAD_AVG_MAX - decay_load(LOAD_AVG_MAX, periods) - 1024; in __accumulate_pelt_segments()
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/linux-6.14.4/Documentation/filesystems/xfs/
Dxfs-delayed-logging-design.rst1 .. SPDX-License-Identifier: GPL-2.0
33 details logged are made up of the changes to in-core structures rather than
34 on-disk structures. Other objects - typically buffers - have their physical
64 place. This means that permanent transactions can be used for one-shot
65 modifications, but one-shot reservations cannot be used for permanent
68 In the code, a one-shot transaction pattern looks somewhat like this::
97 While this might look similar to a one-shot transaction, there is an important
123 the on-disk journal.
165 transaction, we have to reserve enough space to record a full leaf-to-root split
183 For one-shot transactions, a single unit space reservation is all that is
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/linux-6.14.4/drivers/comedi/drivers/
Drtd520.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
13 * Devices: [Real Time Devices] DM7520HR-1 (DM7520), DM7520HR-8,
14 * PCI4520 (PCI4520), PCI4520-8
16 * Status: Works. Only tested on DM7520-8. Not SMP safe.
24 * The PCI4520 is a PCI card. The DM7520 is a PC/104-plus card.
38 * The DM7520 has slightly fewer features (fewer gain steps).
40 * These boards can support external multiplexors and multi-board
71 * Analog-In supports instruction and command mode.
73 * With DMA, you can sample at 1.15Mhz with 70% idle on a 400Mhz K6-2
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/linux-6.14.4/drivers/leds/
Dleds-mt6323.c1 // SPDX-License-Identifier: GPL-2.0-or-later
47 /* ISINK_CON1: Register to setup the period of the blink. */
69 * struct mt6323_led - state container for the LED device
83 * struct mt6323_regs - register spec for the LED device
107 * struct mt6323_hwspec - hardware specific parameters
108 * @max_period: Maximum period for all LEDs
112 * @unit_duty: Steps of duty per period
123 * struct mt6323_data - device specific data
133 * struct mt6323_leds - state container for holding LED controller
156 struct mt6323_leds *leds = led->parent; in mt6323_led_hw_brightness()
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/linux-6.14.4/drivers/gpu/drm/panel/
Dpanel-novatek-nt35510.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * per-panel, e.g. for physical size.
131 /* 52 gamma parameters times two per color: positive and negative */
147 * struct nt35510_config - the display-specific NT35510 configuration
173 * +------------------------------------------->
203 * in 0.1V steps the default is 0x05 which means 6.0V
207 * @bt1ctr: setting for boost power control for the AVDD step-up
210 * frequency for the step-up circuit:
220 * amplification for the step-up circuit:
231 * @avee: setting for AVEE ranging from 0x00 = -6.5V to 0x14 = -4.5V
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/linux-6.14.4/kernel/rcu/
Dsrcutree.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Sleepable Read-Copy Update mechanism for mutual exclusion.
11 * For detailed explanation of Read-Copy Update mechanism see -
33 /* Holdoff in nanoseconds for auto-expediting. */
38 /* Overflow-check frequency. N bits roughly says every 2**N grace periods. */
63 /* Number of CPUs to trigger init_srcu_struct()-time transition to big. */
67 /* Contention events per jiffy to initiate transition to big. */
71 /* Early-boot callback-management, so early that no lock is required! */
117 * Initialize SRCU per-CPU data. Note that statically allocated
120 * is set, don't initialize ->srcu_lock_count[] and ->srcu_unlock_count[].
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/linux-6.14.4/arch/arm/boot/dts/nxp/imx/
Dimx6dl-b1x5pv2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 // Copyright 2018-2021 General Electric Company
7 // Copyright 2018-2021 Collabora
9 #include <dt-bindings/input/input.h>
10 #include "imx6dl-qmx6.dtsi"
14 stdout-path = &uart3;
20 operating-points = <
25 fsl,soc-operating-points = <
26 /* ARM kHz SOC-PU uV */
33 operating-points = <
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/linux-6.14.4/Documentation/ABI/testing/
Dsysfs-bus-iio3 Contact: linux-[email protected]
11 Contact: linux-[email protected]
25 Contact: linux-[email protected]
31 Contact: linux-[email protected]
38 Contact: linux-[email protected]
44 The contents of the label are free-form, but there are some
51 * "proximity-wifi"
52 * "proximity-lte"
53 * "proximity-wifi-lte"
54 * "proximity-wifi-left"
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/linux-6.14.4/Documentation/RCU/Design/Requirements/
DRequirements.rst16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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/linux-6.14.4/tools/perf/Documentation/
Dperf-script.txt1 perf-script(1)
5 ----
6 perf-script - Read perf.data (created by perf record) and display trace output
9 --------
12 'perf script' [<options>] record <script> [<record-options>] <command>
13 'perf script' [<options>] report <script> [script-args]
14 'perf script' [<options>] <script> <required-script-args> [<record-options>] <command>
15 'perf script' [<options>] <top-script> [script-args]
18 -----------
26 You can also run a set of pre-canned scripts that aggregate and
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/linux-6.14.4/kernel/power/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 suspend-to-RAM state (e.g. the ACPI S3 state).
30 user-space before invoking suspend. There's a run-time switch
32 This setting changes the default for the run-tim switch. Say Y
58 ACPI will be used for the final steps when it is available. One
60 for suspend states like suspend-to-RAM (STR) often don't work very
72 <file:Documentation/power/swsusp-and-swap-files.rst>).
122 The default resume partition is the partition that the suspend-
123 to-disk implementation will look for a suspended disk image.
157 non-zero numbered CPU, it may define ARCH_SUSPEND_NONZERO_CPU. This
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/linux-6.14.4/drivers/rtc/
Drtc-renesas-rtca3.c1 // SPDX-License-Identifier: GPL-2.0
3 * On-Chip RTC Support available on RZ/G3S SoC
93 * enum rtca3_alrm_set_step - RTCA3 alarm set steps
105 * struct rtca3_ppb_per_cycle - PPB per cycle
106 * @ten_sec: PPB per cycle in 10 seconds adjutment mode
107 * @sixty_sec: PPB per cycle in 60 seconds adjustment mode
115 * struct rtca3_priv - RTCA3 private data structure
122 * @ppb: ppb per cycle for each the available adjustment modes
140 tmp = readb(priv->base + off); in rtca3_byte_update_bits()
143 writeb(tmp, priv->base + off); in rtca3_byte_update_bits()
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