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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Bus controller for MediaTek ARM SoCs
10 - Leilk Liu <[email protected]>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - items:
19 - enum:
20 - mediatek,mt7629-spi
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/linux-6.14.4/drivers/spi/
Dspi-sifive.c1 // SPDX-License-Identifier: GPL-2.0
5 // SiFive SPI controller driver (master mode only)
10 #include <linux/clk.h>
15 #include <linux/spi/spi.h>
38 #define SIFIVE_SPI_REG_FCTRL 0x60 /* SPI flash interface control */
39 #define SIFIVE_SPI_REG_FFMT 0x64 /* SPI flash instruction format */
93 struct clk *clk; /* bus clock */ member
96 struct completion done; /* wake-up from interrupt */
99 static void sifive_spi_write(struct sifive_spi *spi, int offset, u32 value) in sifive_spi_write() argument
101 iowrite32(value, spi->regs + offset); in sifive_spi_write()
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Dspi-ar934x.c1 // SPDX-License-Identifier: GPL-2.0
3 // SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs
7 // Based on spi-mt7621.c:
9 // Copyright (C) 2011-2013 Gabor Juhos <[email protected]>
10 // Copyright (C) 2014-2015 Felix Fietkau <[email protected]>
12 #include <linux/clk.h>
19 #include <linux/spi/spi.h>
21 #define DRIVER_NAME "spi-ar934x"
47 struct clk *clk; member
53 int div = DIV_ROUND_UP(sp->clk_freq, freq * 2) - 1; in ar934x_spi_clk_div()
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Dspi-bcmbca-hsspi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom BCMBCA High Speed SPI Controller driver
5 * Copyright 2000-2010 Broadcom Corporation
6 * Copyright 2012-2013 Jonas Gorski <[email protected]>
7 * Copyright 2019-2022 Broadcom Ltd
13 #include <linux/clk.h>
17 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
23 #include <linux/spi/spi-mem.h>
99 #define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
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Dspi-ath79.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
5 * Copyright (C) 2009-2011 Gabor Juhos <[email protected]>
7 * This driver has been based on the spi-gpio.c:
17 #include <linux/spi/spi.h>
18 #include <linux/spi/spi-mem.h>
19 #include <linux/spi/spi_bitbang.h>
21 #include <linux/clk.h>
24 #define DRV_NAME "ath79-spi"
30 #define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */
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Dspi-loongson-core.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Loongson SPI Support
5 #include <linux/clk.h>
14 #include <linux/spi/spi.h>
16 #include "spi-loongson.h"
18 static inline void loongson_spi_write_reg(struct loongson_spi *spi, unsigned char reg, in loongson_spi_write_reg() argument
21 writeb(data, spi->base + reg); in loongson_spi_write_reg()
24 static inline char loongson_spi_read_reg(struct loongson_spi *spi, unsigned char reg) in loongson_spi_read_reg() argument
26 return readb(spi->base + reg); in loongson_spi_read_reg()
29 static void loongson_spi_set_cs(struct spi_device *spi, bool en) in loongson_spi_set_cs() argument
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Dspi-at91-usart.c1 // SPDX-License-Identifier: GPL-2.0
3 // Driver for AT91 USART Controllers as SPI
9 #include <linux/clk.h>
12 #include <linux/dma-direction.h>
21 #include <linux/spi/spi.h>
69 readl_relaxed((port)->regs + US_##reg)
71 writel_relaxed((value), (port)->regs + US_##reg)
74 readb_relaxed((port)->regs + US_##reg)
76 writeb_relaxed((value), (port)->regs + US_##reg)
83 struct clk *clk; member
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Dspi-st-ssc4.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
9 * SPI host mode controller driver, used in STMicroelectronics devices.
12 #include <linux/clk.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/spi_bitbang.h>
54 /* SSC SPI Controller */
56 struct clk *clk; member
59 /* SSC SPI current transaction */
74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
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Dspi-meson-spifc.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Driver for Amlogic Meson SPI flash controller (SPIFC)
8 #include <linux/clk.h>
18 #include <linux/spi/spi.h>
56 #define USER_UC_MASK ((BIT(5) - 1) << 27)
70 * @host: the SPI host
72 * @clk: input clock of the built-in baud rate generator
78 struct clk *clk; member
90 * meson_spifc_wait_ready() - wait for the current operation to terminate
91 * @spifc: the Meson SPI device
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Dspi-mxs.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Freescale MXS SPI host driver
15 // Based on code from U-Boot bootloader by:
18 // Based on spi-stmp.c, which is:
28 #include <linux/dma-mapping.h>
31 #include <linux/clk.h>
39 #include <linux/spi/spi.h>
40 #include <linux/spi/mxs-spi.h>
41 #include <trace/events/spi.h>
42 #include <linux/dma/mxs-dma.h>
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Dspi-bcm63xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Broadcom BCM63xx SPI controller support
5 * Copyright (C) 2009-2012 Florian Fainelli <[email protected]>
10 #include <linux/clk.h>
16 #include <linux/spi/spi.h>
23 /* BCM 6338/6348 SPI core */
25 #define SPI_6348_CMD 0x00 /* 16-bits register */
34 #define SPI_6348_MSG_CTL 0x40 /* 8-bits register */
41 /* BCM 3368/6358/6262/6368 SPI core */
43 #define SPI_6358_MSG_CTL 0x00 /* 16-bits register */
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Dspi-mpc512x-psc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC512x PSC in SPI mode driver.
7 * Hongjun Chen <hong-[email protected]>
22 #include <linux/clk.h>
23 #include <linux/spi/spi.h>
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
40 __ret = &psc->regname; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
45 __ret = &psc->regname; \
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Dspi-orion.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Marvell Orion SPI controller driver
6 * Copyright (C) 2007-2008 Marvell Ltd.
14 #include <linux/spi/spi.h>
19 #include <linux/clk.h>
73 * have both is for managing the armada-370-spi case with old
95 struct clk *clk; member
96 struct clk *axi_clk;
110 return orion_spi->base + reg; in spi_reg()
135 static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed) in orion_spi_baudrate_set() argument
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Dspi-jcore.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * J-Core SPI controller driver
5 * Copyright (C) 2012-2016 Smart Energy Instruments, Inc.
16 #include <linux/spi/spi.h>
17 #include <linux/clk.h>
52 } while (--timeout); in jcore_spi_wait()
54 return -EBUSY; in jcore_spi_wait()
59 void __iomem *ctrl_reg = hw->base + CTRL_REG; in jcore_spi_program()
62 dev_err(hw->host->dev.parent, in jcore_spi_program()
65 writel(hw->cs_reg | hw->speed_reg, ctrl_reg); in jcore_spi_program()
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Dspi-microchip-core.c1 // SPDX-License-Identifier: (GPL-2.0)
3 * Microchip CoreSPI SPI controller driver
5 * Copyright (c) 2018-2022 Microchip Technology Inc. and its subsidiaries
12 #include <linux/clk.h>
21 #include <linux/spi/spi.h>
104 struct clk *clk; member
107 u32 clk_gen; /* divider for spi output clock generated by the controller */
116 static inline u32 mchp_corespi_read(struct mchp_corespi *spi, unsigned int reg) in mchp_corespi_read() argument
118 return readl(spi->regs + reg); in mchp_corespi_read()
121 static inline void mchp_corespi_write(struct mchp_corespi *spi, unsigned int reg, u32 val) in mchp_corespi_write() argument
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Dspi-mt7621.c1 // SPDX-License-Identifier: GPL-2.0
3 // spi-mt7621.c -- MediaTek MT7621 SPI controller driver
6 // Copyright (C) 2011-2013 Gabor Juhos <[email protected]>
7 // Copyright (C) 2014-2015 Felix Fietkau <[email protected]>
9 // Some parts are based on spi-orion.c:
11 // Copyright (C) 2007-2008 Marvell Ltd.
13 #include <linux/clk.h>
21 #include <linux/spi/spi.h>
23 #define DRIVER_NAME "spi-mt7621"
65 static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi) in spidev_to_mt7621_spi() argument
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Dspi-bcm63xx-hsspi.c2 * Broadcom BCM63XX High Speed SPI Controller driver
4 * Copyright 2000-2010 Broadcom Corporation
5 * Copyright 2012-2013 Jonas Gorski <[email protected]>
13 #include <linux/clk.h>
17 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
23 #include <linux/spi/spi-mem.h>
24 #include <linux/mtd/spi-nor.h>
105 #define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
124 if (bs->xfer_mode == HSSPI_XFER_MODE_AUTO) \
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Dspi-armada-3700.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Marvell Armada-3700 SPI controller driver
8 * Author: Romain Perier <romain.perier@free-electrons.com>
11 #include <linux/clk.h>
22 #include <linux/spi/spi.h>
30 /* SPI Register Offest */
104 struct clk *clk; member
118 return readl(a3700_spi->base + offset); in spireg_read()
123 writel(data, a3700_spi->base + offset); in spireg_write()
171 /* RX during address reception uses 4-pin */ in a3700_spi_pin_mode_set()
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Dspi-rb4xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI controller driver for the Mikrotik RB4xx boards
15 #include <linux/clk.h>
16 #include <linux/spi/spi.h>
19 #include <asm/mach-ath79/ar71xx_regs.h>
23 struct clk *clk; member
28 return __raw_readl(rbspi->base + reg); in rb4xx_read()
33 __raw_writel(value, rbspi->base + reg); in rb4xx_write()
52 for (i = 7; i >= 0; i--) in do_spi_byte()
81 static void rb4xx_set_cs(struct spi_device *spi, bool enable) in rb4xx_set_cs() argument
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Dspi-dw-bt1.c1 // SPDX-License-Identifier: GPL-2.0-only
9 // Baikal-T1 DW APB SPI and System Boot SPI driver
12 #include <linux/clk.h>
24 #include <linux/spi/spi-mem.h>
25 #include <linux/spi/spi.h>
27 #include "spi-dw.h"
34 struct clk *clk; member
52 struct dw_spi_bt1 *dwsbt1 = to_dw_spi_bt1(desc->mem->spi->controller); in dw_spi_bt1_dirmap_create()
54 if (!dwsbt1->map || in dw_spi_bt1_dirmap_create()
55 !dwsbt1->dws.mem_ops.supports_op(desc->mem, &desc->info.op_tmpl)) in dw_spi_bt1_dirmap_create()
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/linux-6.14.4/drivers/iio/frequency/
Dadf4350.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADF4350/ADF4351 SPI Wideband Synthesizer driver
5 * Copyright 2012-2013 Analog Devices Inc.
15 #include <linux/spi/spi.h>
21 #include <linux/clk.h>
22 #include <linux/clk-provider.h>
36 struct spi_device *spi; member
39 struct clk *clk; member
40 struct clk *clkout;
56 * writes. The device is configured via a sequence of SPI writes,
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/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
25 mpp1 1 gpo, nand(io3), spi(mosi)
26 mpp2 2 gpo, nand(io4), spi(sck)
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/linux-6.14.4/drivers/net/can/spi/
Dhi311x.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* CAN bus driver for Holt HI3110 CAN Controller with SPI Interface
12 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix
13 * - Simon Kallweit, intefo AG
19 #include <linux/clk.h>
35 #include <linux/spi/spi.h>
147 struct spi_device *spi; member
150 struct mutex hi3110_lock; /* SPI device lock */
172 struct clk *clk; member
179 if (priv->tx_skb || priv->tx_busy) in hi3110_clean()
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/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt7981b.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/reset/mt7986-resets.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a53";
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
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