Searched +full:sparx5 +full:- +full:serdes (Results 1 – 13 of 13) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/phy/ |
D | microchip,sparx5-serdes.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip Sparx5 Serdes controller 10 - Steen Hegelund <[email protected]> 11 - Daniel Machon <[email protected]> 14 The Sparx5 SERDES interfaces share the same basic functionality, but 17 The following list lists the SERDES features: 22 * Rx built-in fault detector (loss-of-lock/loss-of-signal) [all …]
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/linux-6.14.4/drivers/net/ethernet/microchip/sparx5/ |
D | sparx5_netdev.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Microchip Sparx5 Switch driver 21 /* Max width is 5 bytes - 40 bits. In worst case this will 22 * spread over 6 bytes - 48 bits 33 u32 byte = (35 - (pos / 8)); in __ifh_encode_bitfield() 36 u64 encode = GENMASK_ULL(bit + width - 1, bit) & (value << bit); in __ifh_encode_bitfield() 38 /* The b0-b7 goes into the start IFH byte */ in __ifh_encode_bitfield() 41 /* The b8-b15 goes into the next IFH byte */ in __ifh_encode_bitfield() 43 ifh_hdr[byte - 1] |= (u8)((encode & 0xFF00) >> 8); in __ifh_encode_bitfield() 44 /* The b16-b23 goes into the next IFH byte */ in __ifh_encode_bitfield() [all …]
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D | sparx5_main.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Microchip Sparx5 Switch driver 6 * The Sparx5 Chip Register Model can be browsed at this location: 7 * https://github.com/microchip-ung/sparx-5_reginfo 44 struct phy *serdes; member 215 bool is_sparx5(struct sparx5 *sparx5) in is_sparx5() argument 217 switch (sparx5->target_ct) { in is_sparx5() 234 static void sparx5_init_features(struct sparx5 *sparx5) in sparx5_init_features() argument 236 switch (sparx5->target_ct) { in sparx5_init_features() 256 sparx5->features = (SPX5_FEATURE_PSFP | SPX5_FEATURE_PTP); in sparx5_init_features() [all …]
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D | sparx5_port.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Microchip Sparx5 Switch driver 31 status->an_complete = true; in decode_sgmii_word() 33 status->link = false; in decode_sgmii_word() 39 status->speed = SPEED_10; in decode_sgmii_word() 42 status->speed = SPEED_100; in decode_sgmii_word() 45 status->speed = SPEED_1000; in decode_sgmii_word() 48 status->link = false; in decode_sgmii_word() 52 status->duplex = DUPLEX_FULL; in decode_sgmii_word() 54 status->duplex = DUPLEX_HALF; in decode_sgmii_word() [all …]
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D | sparx5_main.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Microchip Sparx5 Switch driver 29 SPX5_TARGET_CT_7546 = 0x7546, /* SparX-5-64 Enterprise */ 30 SPX5_TARGET_CT_7549 = 0x7549, /* SparX-5-90 Enterprise */ 31 SPX5_TARGET_CT_7552 = 0x7552, /* SparX-5-128 Enterprise */ 32 SPX5_TARGET_CT_7556 = 0x7556, /* SparX-5-160 Enterprise */ 33 SPX5_TARGET_CT_7558 = 0x7558, /* SparX-5-200 Enterprise */ 34 SPX5_TARGET_CT_7546TSN = 0x47546, /* SparX-5-64i Industrial */ 35 SPX5_TARGET_CT_7549TSN = 0x47549, /* SparX-5-90i Industrial */ 36 SPX5_TARGET_CT_7552TSN = 0x47552, /* SparX-5-128i Industrial */ [all …]
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/linux-6.14.4/drivers/phy/microchip/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 7 tristate "Microchip Sparx5 SerDes PHY driver" 13 Enable this for support of the 10G/25G SerDes on Microchip Sparx5. 16 tristate "SerDes PHY driver for Microchip LAN966X" 21 Enable this for supporting SerDes muxing with Microchip LAN966X
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D | sparx5_serdes.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* Microchip Sparx5 Switch SerDes driver 6 * The Sparx5 Chip Register Model can be browsed at this location: 7 * https://github.com/microchip-ung/sparx-5_reginfo 9 …* https://ww1.microchip.com/downloads/en/DeviceDoc/SparX-5_Family_L2L3_Enterprise_10G_Ethernet_Swi… 114 u8 if_width; /* UDL if-width: 10/16/20/32/64 */ 116 enum sparx5_10g28cmu_mode cmu_sel; /* Device/Mode serdes uses */ 117 bool no_pwrcycle:1; /* Omit initial power-cycle */ 246 enum sparx5_10g28cmu_mode cmu_sel; /* Device/Mode serdes uses */ 256 bool no_pwrcycle:1; /* Omit initial power-cycle */ [all …]
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D | sparx5_serdes.h | 1 /* SPDX-License-Identifier: GPL-2.0+ 2 * Microchip Sparx5 SerDes driver 119 sdx5_addr(priv->regs, id, tinst, tcnt, in sdx5_rmw() 154 return priv->regs[id + tinst]; in sdx5_inst_get()
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D | sparx5_serdes_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0+ 2 * Microchip Sparx5 SerDes driver 7 /* This file is autogenerated by cml-utils 2023-04-13 15:02:00 +0200. 1057 /* SPARX5 ONLY */ 1092 /* SPARX5 ONLY */ 1145 /* SPARX5 ONLY */ 1180 /* SPARX5 ONLY */ 1215 /* SPARX5 ONLY */ 1232 /* SPARX5 ONLY */ 1249 /* SPARX5 ONLY */ [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/net/ |
D | microchip,sparx5-switch.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip Sparx5 Ethernet switch controller 10 - Steen Hegelund <[email protected]> 11 - Lars Povlsen <[email protected]> 12 - Daniel Machon <[email protected]> 15 The SparX-5 Enterprise Ethernet switch family provides a rich set of 16 Enterprise switching features such as advanced TCAM-based VLAN and [all …]
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/linux-6.14.4/arch/arm64/boot/dts/microchip/ |
D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/microchip,sparx5.h> 11 compatible = "microchip,sparx5"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <1>; 23 stdout-path = "serial0:115200n8"; 27 #address-cells = <1>; [all …]
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/linux-6.14.4/arch/arm/boot/dts/microchip/ |
D | lan966x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/mfd/atmel-flexcom.h> 14 #include <dt-bindings/dma/at91.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/clock/microchip,lan966x.h> 21 interrupt-parent = <&gic>; 22 #address-cells = <1>; [all …]
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/linux-6.14.4/ |
D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-[email protected] 88 F: drivers/scsi/3w-* [all …]
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