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/linux-6.14.4/Documentation/devicetree/bindings/connector/
Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <[email protected]>
20 - enum:
21 - usb-a-connector
22 - usb-b-connector
23 - usb-c-connector
25 - items:
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/linux-6.14.4/drivers/usb/typec/tcpm/
Dtcpm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2015-2017 Google, Inc
212 VDM_STATE_ERR_BUSY = -3,
213 VDM_STATE_ERR_SEND = -2,
214 VDM_STATE_ERR_TMOUT = -1,
243 * Based on "Table 6-14 Fixed Supply PDO - Sink" of "USB Power Delivery Specification Revision 3.0,
324 * @sink_wait_cap_time: Deadline (in ms) for tTypeCSinkWaitCap timer
325 * @ps_src_wait_off_time: Deadline (in ms) for tPSSourceOff timer
326 * @cc_debounce_time: Deadline (in ms) for tCCDebounce timer
514 /* Sink FRS */
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/
Ddc.h2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
108 // for example, 1080p -> 8K is 4.0, or 4000 raw value
116 // for example, 8K -> 1080p is 0.25, or 250 raw value
128 * DOC: color-management-caps
133 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
140 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
156 * struct dpp_color_caps - color pipeline capabilities for display pipe and
161 * just plain 256-entry lookup
170 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
171 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
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/linux-6.14.4/net/ipv4/
Dtcp_bbr.c21 * +---> STARTUP ----+
24 * | DRAIN ----+
27 * +---> PROBE_BW ----+
30 * | +----+ |
32 * +---- PROBE_RTT <--+
37 * A long-lived BBR flow spends the vast majority of its time remaining
42 * it briefly enters PROBE_RTT to cut inflight to a minimum value to re-probe
43 * the path's two-way propagation delay (min_rtt). When exiting PROBE_RTT, if
48 * "BBR: Congestion-Based Congestion Control",
50 * Van Jacobson. ACM Queue, Vol. 14 No. 5, September-October 2016.
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/linux-6.14.4/drivers/gpu/drm/mediatek/
Dmtk_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019-2022 MediaTek Inc.
18 #include <linux/arm-smccc.h>
23 #include <linux/media-bus-format.h>
24 #include <linux/nvmem-consumer.h>
33 #include <sound/hdmi-codec.h>
402 .name = "mtk-dp-registers",
415 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read()
417 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read()
427 int ret = regmap_write(mtk_dp->regs, offset, val); in mtk_dp_write()
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/linux-6.14.4/drivers/gpu/drm/i915/display/
Dintel_dp.c126 * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
138 return dig_port->base.type == INTEL_OUTPUT_EDP; in intel_dp_is_edp()
146 return drm_dp_is_uhbr_rate(crtc_state->port_clock); in intel_dp_is_uhbr()
150 * intel_dp_link_symbol_size - get the link symbol size for a given link rate
154 * rate -> channel coding.
162 * intel_dp_link_symbol_clock - convert link rate to link symbol clock
176 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in max_dprx_rate()
180 max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); in max_dprx_rate()
182 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in max_dprx_rate()
189 if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) { in max_dprx_rate()
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/linux-6.14.4/drivers/net/wireless/realtek/rtw89/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
45 #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI)
102 RTW89_CH_6G_BAND_IDX6, /* Ultra-high */
103 RTW89_CH_6G_BAND_IDX7, /* Ultra-high */
251 * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast
252 * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP
253 * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP
750 #define RTW89_MIN_VALID_POWER_CONSTRAINT (-10) /* unit: dBm */
955 /* The follow-up are derived from the above. We must ensure that it
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/linux-6.14.4/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm.c101 #include <media/cec-notifier.h>
185 switch (link->dpcd_caps.dongle_type) { in get_subconnector_type()
204 struct dc_link *link = aconnector->dc_link; in update_subconnector_property()
205 struct drm_connector *connector = &aconnector->base; in update_subconnector_property()
208 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in update_subconnector_property()
211 if (aconnector->dc_sink) in update_subconnector_property()
214 drm_object_property_set_value(&connector->base, in update_subconnector_property()
215 connector->dev->mode_config.dp_subconnector_property, in update_subconnector_property()
262 * struct amdgpu_device *adev - [in] desired amdgpu device
263 * int disp_idx - [in] which CRTC to get the counter from
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/linux-6.14.4/drivers/gpu/drm/bridge/analogix/
Danx7625.c1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <media/v4l2-fwnode.h>
36 #include <sound/hdmi-codec.h>
50 struct device *dev = &client->dev; in i2c_access_workaround()
53 if (client == ctx->last_client) in i2c_access_workaround()
56 ctx->last_client = client; in i2c_access_workaround()
58 if (client == ctx->i2c.tcpc_client) in i2c_access_workaround()
60 else if (client == ctx->i2c.tx_p0_client) in i2c_access_workaround()
62 else if (client == ctx->i2c.tx_p1_client) in i2c_access_workaround()
64 else if (client == ctx->i2c.rx_p0_client) in i2c_access_workaround()
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/linux-6.14.4/sound/pci/hda/
Dpatch_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation
82 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
83 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
90 bool chmap_set; /* channel-map override by ALSA API? */
91 unsigned char chmap[8]; /* ALSA API channel-map */
127 SILENT_STREAM_KAE, /* use standard HDA Keep-Alive */
176 bool intel_hsw_fixup; /* apply Intel platform-specific fixups */
178 * Non-generic VIA/NVIDIA specific
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/linux-6.14.4/include/linux/platform_data/
Dcros_ec_commands.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
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/linux-6.14.4/drivers/staging/rtl8723bs/core/
Drtw_mlme_ext.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
21 /*----------------------------------------------------------
23 -----------------------------------------------------------*/
174 * return the index of channel_num in channel_set, -1 if not found
186 return -1; in rtw_ch_set_search_ch()
198 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; in init_hw_mlme_ext()
200 set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); in init_hw_mlme_ext()
206 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; in init_mlme_default_rate_set()
212 memcpy(pmlmeext->datarate, mixed_datarate, NumRates); in init_mlme_default_rate_set()
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