| /linux-6.14.4/Documentation/devicetree/bindings/leds/ |
| D | leds-bcm63138.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-bcm63138.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <[email protected]>
24 - items:
25 - enum:
26 - brcm,bcm4908-leds
27 - brcm,bcm6848-leds
28 - brcm,bcm6858-leds
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| /linux-6.14.4/drivers/leds/ |
| D | leds-bcm6328.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for BCM6328 memory-mapped LEDs, based on leds-syscon.c
59 * struct bcm6328_led - state container for bcm6328 based LEDs
97 * LEDMode 64 bits / 24 LEDs
98 * bits [31:0] -> LEDs 8-23
99 * bits [47:32] -> LEDs 0-7
100 * bits [63:48] -> unused
105 return pin + 16; /* LEDs 0-7 (bits 47:32) */ in bcm6328_pin2shift()
107 return pin - 8; /* LEDs 8-23 (bits 31:0) */ in bcm6328_pin2shift()
113 unsigned long val, shift; in bcm6328_led_mode() local
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| /linux-6.14.4/Documentation/devicetree/bindings/gpio/ |
| D | gpio-stp-xway.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-stp-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lantiq SoC Serial To Parallel (STP) GPIO controller
10 The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
11 peripheral controller used to drive external shift register cascades. At most
12 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
16 - John Crispin <[email protected]>
20 pattern: "^gpio@[0-9a-f]+$"
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| /linux-6.14.4/Documentation/networking/device_drivers/hamradio/ |
| D | baycom.rst | 1 .. SPDX-License-Identifier: GPL-2.0
23 serial port. Its devices are called bcsf0 through bcsf3.
26 delta status bits, you may try baycom_ser_hdx.
41 This driver is work-in-progress.
49 for handling the HDLC protocol. The modem connects to a serial port,
50 hence the name. Since the serial port is not used as an async serial
51 port, the kernel driver for serial ports cannot be used, and this
52 driver only supports standard serial hardware (8250, 16450, 16550)
56 Data is transferred from and to the PC via a shift register.
57 The shift register is filled with 16 bits and an interrupt is signalled.
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| /linux-6.14.4/Documentation/driver-api/ |
| D | spi.rst | 1 Serial Peripheral Interface (SPI)
4 SPI is the "Serial Peripheral Interface", widely used with embedded
6 multiplexed shift register. Its three signal wires hold a clock (SCK,
7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
10 another is shifted in on the MISO line. Those bits are assembled into
12 additional chipselect line is usually active-low (nCS); four signals are
26 SPI shift register (maximizing throughput). Such drivers bridge between
33 board-specific initialization code. A :c:type:`struct spi_driver
44 policies for how they use the bits transferred with SPI.
46 .. kernel-doc:: include/linux/spi/spi.h
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| /linux-6.14.4/arch/mips/ |
| D | Kconfig.debug | 1 # SPDX-License-Identifier: GPL-2.0
22 "8250/16550 and compatible serial early printk driver"
23 If you say Y here, it will be possible to use a 8250/16550 serial
30 bool "Built-in kernel command line"
41 The built-in options will be concatenated to the default command
43 command line will be ignored and replaced by the built-in string.
46 the command line from the firmware or the second-stage bootloader.
55 the default command line, you can supply some command-line options at
64 bool "Built-in command line overrides firmware arguments"
69 Instead, the built-in command line will be used exclusively.
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| /linux-6.14.4/drivers/pcmcia/ |
| D | ti113x.h | 34 /* Register definitions for TI 113X PCI-to-CardBus bridges */
166 #define ti_sysctl(socket) ((socket)->private[0])
167 #define ti_cardctl(socket) ((socket)->private[1])
168 #define ti_devctl(socket) ((socket)->private[2])
169 #define ti_diag(socket) ((socket)->private[3])
170 #define ti_mfunc(socket) ((socket)->private[4])
171 #define ene_test_c9(socket) ((socket)->private[5])
184 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) in ti_save_state()
196 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) in ti_restore_state()
224 * itself about this - do we need to force func0, if so we need
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| /linux-6.14.4/arch/arm64/boot/dts/rockchip/ |
| D | rk3576.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rk3576-power.h>
12 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
18 interrupt-parent = <&gic>;
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| /linux-6.14.4/drivers/gpio/ |
| D | gpio-74x164.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
27 * the previous byte shift to the next register in the
37 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, in __gen_74x164_write_config()
38 chip->registers); in __gen_74x164_write_config()
44 u8 bank = chip->registers - 1 - offset / 8; in gen_74x164_get_value()
48 mutex_lock(&chip->lock); in gen_74x164_get_value()
49 ret = (chip->buffer[bank] >> pin) & 0x1; in gen_74x164_get_value()
50 mutex_unlock(&chip->lock); in gen_74x164_get_value()
59 u8 bank = chip->registers - 1 - offset / 8; in gen_74x164_set_value()
[all …]
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| D | gpio-stp-xway.c | 1 // SPDX-License-Identifier: GPL-2.0-only
20 * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
21 * peripheral controller used to drive external shift register cascades. At most
22 * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
58 /* 2 groups of 3 bits can be driven by the phys */
65 /* STP has 3 groups of 8 bits */
71 /* Edge configuration bits */
83 u32 edge; /* rising or falling edge triggered shift register */
84 u32 shadow; /* shadow the shift registers state */
85 u8 groups; /* we can drive 1-3 groups of 8bit each */
[all …]
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| /linux-6.14.4/drivers/leds/blink/ |
| D | leds-bcm63138.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/bits.h>
19 #define BCM63138_LED_BITS 4 /* how many bits control a single LED */
20 #define BCM63138_LED_MASK ((1 << BCM63138_LED_BITS) - 1) /* 0xf */
40 #define BCM63138_POWER_LUT_BASE0 0x34 /* -> b0 */
72 writel(data, leds->base + reg); in bcm63138_leds_write()
78 return readl(leds->base + reg); in bcm63138_leds_read()
97 int reg_offset = (led->pin >> fls((BCM63138_LEDS_PER_REG - 1))) * 4; in bcm63138_leds_set_flash_rate()
98 int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS; in bcm63138_leds_set_flash_rate() local
101 BCM63138_LED_MASK << shift, value << shift); in bcm63138_leds_set_flash_rate()
[all …]
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| /linux-6.14.4/arch/powerpc/boot/ |
| D | 4xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright 2002-2005 MontaVista Software Inc.
34 memsize -= 4096; in chip_11_errata()
159 #define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) argument
162 * Some U-Boot versions set the number of chipselects to two
181 model[sizeof(model)-1] = 0; in ibm4xx_denali_get_cs()
226 dpath = 4; /* 32 bits */ in ibm4xx_denali_fixup_memsize()
228 dpath = 8; /* 64 bits */ in ibm4xx_denali_fixup_memsize()
236 row = max_row - row; in ibm4xx_denali_fixup_memsize()
244 col = max_col - col; in ibm4xx_denali_fixup_memsize()
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| /linux-6.14.4/Documentation/devicetree/bindings/media/ |
| D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <[email protected]>
11 - Laurent Pinchart <[email protected]>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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| /linux-6.14.4/drivers/usb/serial/ |
| D | mct_u232.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
7 * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
8 * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
9 * Model No. U232-P9). See http://www.mct.com.tw/products/product_us232.html
11 * of this file. This device was used in the Dlink DSB-S25.
24 /* U232-P25, Sitecom */
27 /* DU-H3SP USB BAY hub */
28 #define MCT_U232_DU_H3SP_PID 0x0200 /* D-Link DU-H3SP USB BAY */
30 /* Belkin badge the MCT U232-P9 as the F5U109 */
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| /linux-6.14.4/Documentation/devicetree/bindings/ |
| D | xilinx.txt | 5 of standard device types (network, serial, etc.) and miscellaneous
10 Each IP-core has a set of parameters which the FPGA designer can use to
20 properties of the device node. In general, device nodes for IP-cores
23 (name): (generic-name)@(base-address) {
24 compatible = "xlnx,(ip-core-name)-(HW_VER)"
27 interrupt-parent = <&interrupt-controller-phandle>;
29 xlnx,(parameter1) = "(string-value)";
30 xlnx,(parameter2) = <(int-value)>;
33 (generic-name): an open firmware-style name that describes the
35 as 'serial' or 'ethernet'.
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| /linux-6.14.4/arch/powerpc/boot/dts/ |
| D | microwatt.dts | 1 /dts-v1/;
4 #size-cells = <0x02>;
5 #address-cells = <0x02>;
6 model-name = "microwatt";
7 compatible = "microwatt-soc";
13 reserved-memory {
14 #size-cells = <0x02>;
15 #address-cells = <0x02>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
[all …]
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| /linux-6.14.4/Documentation/staging/ |
| D | crc32.rst | 5 A CRC is a long-division remainder. You add the CRC to the message,
11 protocols put the end-of-frame flag after the CRC.
15 - We're working in binary, so the digits are only 0 and 1, and
16 - When dividing polynomials, there are no carries. Rather than add and
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
24 familiar with the IEEE 754 floating-point format, it's the same idea.)
26 Note that a CRC is computed over a string of *bits*, so you have
27 to decide on the endianness of the bits within each byte. To get
28 the best error-detecting properties, this should correspond to the
[all …]
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| /linux-6.14.4/include/media/ |
| D | v4l2-mediabus.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/v4l2-mediabus.h>
60 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
62 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
64 /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
70 /* Serial flags */
71 /* Clock non-continuous mode support. */
77 * enum v4l2_mbus_csi2_cphy_line_orders_type - CSI-2 C-PHY line order
78 * @V4L2_MBUS_CSI2_CPHY_LINE_ORDER_ABC: C-PHY line order ABC (default)
79 * @V4L2_MBUS_CSI2_CPHY_LINE_ORDER_ACB: C-PHY line order ACB
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| /linux-6.14.4/arch/arm/boot/dts/allwinner/ |
| D | sun8i-a83t.dtsi | 6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
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| /linux-6.14.4/arch/mips/include/asm/sibyte/ |
| D | sb1250_dma.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4)
86 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5)
126 * Ethernet and Serial DMA Descriptor base address (Table 7-6)
133 * ASIC Mode Base Address (Table 7-7)
139 * DMA Descriptor Count Registers (Table 7-8)
146 * Current Descriptor Address Register (Table 7-11)
176 * Descriptor doubleword "A" (Table 7-12)
184 /* Note: Don't shift the address over, just mask it with the mask below */
215 * Descriptor doubleword "B" (Table 7-13)
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| /linux-6.14.4/arch/mips/lantiq/xway/ |
| D | sysctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2011-2012 John Crispin <[email protected]>
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
124 #define PMU1_PCIE_PHY BIT(0) /* vr9-specific,moved in ar10/grx390 */
165 do {} while (--retry && (pmu_r32(PMU_PWDSR) & module)); in ltq_pmu_enable()
180 do {} while (--retry && (!(pmu_r32(PMU_PWDSR) & module))); in ltq_pmu_disable()
191 ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr); in cgu_enable()
198 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr); in cgu_disable()
208 pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module)); in pmu_enable()
209 do {} while (--retry && in pmu_enable()
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| /linux-6.14.4/drivers/media/rc/ |
| D | serial_ir.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * serial_ir - Device driver that records pulse- and pause-lengths
6 * (space-lengths) between DDCD event on a serial port.
8 * Copyright (C) 1996,97 Ralph Metzler <[email protected]-koeln.de>
13 * Copyright (C) 2016 Sean Young <[email protected]> (port to rc-core)
28 #include <media/rc-core.h>
56 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
141 /* fetch serial input packet (1 byte) from register offset */
145 /* the register is memory-mapped */ in sinp()
151 /* write serial output packet (1 byte) of value to register offset */
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| /linux-6.14.4/arch/arm/boot/dts/ti/keystone/ |
| D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
42 /include/ "keystone-k2l-clocks.dtsi"
44 uart2: serial@2348400 {
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| /linux-6.14.4/drivers/iio/adc/ |
| D | stm32-dfsdm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
15 * STM32 DFSDM - global register map
18 * ----------------------------------------------------------
20 * ----------------------------------------------------------
22 * ----------------------------------------------------------
24 * ----------------------------------------------------------
26 * ----------------------------------------------------------
28 * ----------------------------------------------------------
30 * ----------------------------------------------------------
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| /linux-6.14.4/arch/arm/mach-sa1100/include/mach/ |
| D | SA-1100.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * FILE SA-1100.h
9 * System StrongARM SA-1100
12 * SA-1100 microprocessor (Advanced RISC Machine (ARM)
14 * StrongARM SA-1100 data sheet version 2.2.
21 #error You must include hardware.h not SA-1100.h
77 * Universal Serial Bus (USB) Device Controller (UDC) control registers
80 * Ser0UDCCR Serial port 0 Universal Serial Bus (USB) Device
82 * Ser0UDCAR Serial port 0 Universal Serial Bus (USB) Device
84 * Ser0UDCOMP Serial port 0 Universal Serial Bus (USB) Device
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|