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/linux-6.14.4/drivers/clk/imx/
Dclk-imx35.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk.h>
15 #include "clk.h"
33 unsigned char arm, ahb, sel; member
37 { .arm = 1, .ahb = 4, .sel = 0},
38 { .arm = 1, .ahb = 3, .sel = 1},
39 { .arm = 2, .ahb = 2, .sel = 0},
40 { .arm = 0, .ahb = 0, .sel = 0},
41 { .arm = 0, .ahb = 0, .sel = 0},
42 { .arm = 0, .ahb = 0, .sel = 0},
[all …]
Dclk-imx6q.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
10 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <dt-bindings/clock/imx6qdl-clock.h>
22 #include "clk.h"
154 return -ENOENT; in ldb_di_sel_by_clock_id()
165 return -ENOENT; in ldb_di_sel_by_clock_id()
175 int parent, child, sel; in of_assigned_ldb_sels() local
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/linux-6.14.4/drivers/i2c/busses/
Di2c-cbus-gpio.c4 * Copyright (C) 2004-2010 Nokia Corporation
40 struct gpio_desc *clk; member
42 struct gpio_desc *sel; member
46 * cbus_send_bit - sends one bit over the bus
52 gpiod_set_value(host->dat, bit ? 1 : 0); in cbus_send_bit()
53 gpiod_set_value(host->clk, 1); in cbus_send_bit()
54 gpiod_set_value(host->clk, 0); in cbus_send_bit()
58 * cbus_send_data - sends @len amount of data over the bus
67 for (i = len; i > 0; i--) in cbus_send_data()
68 cbus_send_bit(host, data & (1 << (i - 1))); in cbus_send_data()
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a-tqmlx2160a-mblx2160a.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2020-2023 TQ-Systems GmbH <[email protected]-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
14 #include "fsl-lx2160a-tqmlx2160a.dtsi"
18 compatible = "tq,lx2160a-tqmlx2160a-mblx2160a", "tq,lx2160a-tqmlx2160a",
31 stdout-path = &uart0;
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/linux-6.14.4/drivers/clk/qcom/
Dclk-krait.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
13 #include <asm/krait-l2-accessors.h>
15 #include "clk-krait.h"
23 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument
30 regval = krait_get_l2_indirect_reg(mux->offset); in __krait_mux_set_sel()
33 if (mux->disable_sec_src_gating) { in __krait_mux_set_sel()
35 krait_set_l2_indirect_reg(mux->offset, regval); in __krait_mux_set_sel()
38 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel()
39 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel()
[all …]
/linux-6.14.4/drivers/clk/tegra/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
13 #include "clk.h"
31 #define PLL_MISC_CPCON_MASK ((1 << PLL_MISC_CPCON_WIDTH) - 1)
34 #define PLL_MISC_LFCON_MASK ((1 << PLL_MISC_LFCON_WIDTH) - 1)
37 #define PLL_MISC_VCOCON_MASK ((1 << PLL_MISC_VCOCON_WIDTH) - 1)
230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
231 #define pll_readl_base(p) pll_readl(p->params->base_reg, p)
232 #define pll_readl_misc(p) pll_readl(p->params->misc_reg, p)
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/linux-6.14.4/sound/soc/mediatek/mt8186/
Dmt8186-afe-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt8186-afe-gpio.c -- Mediatek 8186 afe gpio ctrl
10 #include "mt8186-afe-common.h"
11 #include "mt8186-afe-gpio.h"
112 return -EINVAL; in mt8186_afe_gpio_select()
118 return -EIO; in mt8186_afe_gpio_select()
139 dev_dbg(dev, "%s(), MOSI CLK ON select fail!\n", __func__); in mt8186_afe_gpio_adda_dl()
157 dev_dbg(dev, "%s(), MOSI CLK ON select fail!\n", __func__); in mt8186_afe_gpio_adda_dl()
172 dev_dbg(dev, "%s(), MISO CLK ON select fail!\n", __func__); in mt8186_afe_gpio_adda_ul()
190 dev_dbg(dev, "%s(), MISO CLK OFF select fail!\n", __func__); in mt8186_afe_gpio_adda_ul()
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/linux-6.14.4/sound/soc/renesas/rcar/
Dadg.c1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
6 #include <linux/clk-provider.h>
33 struct clk *clkin[CLKINMAX];
34 struct clk *clkout[CLKOUTMAX];
35 struct clk *null_clk;
50 (i < adg->clkin_size) && \
51 ((pos) = adg->clkin[i]); \
55 (i < adg->clkout_size) && \
56 ((pos) = adg->clkout[i]); \
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/linux-6.14.4/drivers/media/i2c/
Dov6650.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * Copyright 2006-7 Jonathan Corbet <[email protected]>
25 #include <linux/clk.h>
29 #include <linux/v4l2-mediabus.h>
32 #include <media/v4l2-ctrls.h>
33 #include <media/v4l2-device.h>
36 #define REG_GAIN 0x00 /* range 00 - 3F */
51 /* [5:0]: Internal Clock Pre-Scaler */
165 #define W_QCIF (DEF_HSTOP - DEF_HSTRT)
167 #define H_QCIF (DEF_VSTOP - DEF_VSTRT)
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Dmt9p031.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011, Javier Martin <javier.martin@vista-silicon.com>
12 #include <linux/clk.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-subdev.h>
32 #include "aptina-pll.h"
126 struct clk *clk; member
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Dmt9m001.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-event.h>
21 #include <media/v4l2-subdev.h>
83 /* Order important - see above */
92 /* exposure/auto-exposure cluster */
98 struct clk *clk; member
180 dev_dbg(&client->dev, "%s\n", __func__); in mt9m001_init()
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Dmt9t112.c1 // SPDX-License-Identifier: GPL-2.0
14 * Copyright 2006-7 Jonathan Corbet <[email protected]>
20 * v4l-utils compliance tools will report errors.
23 #include <linux/clk.h>
30 #include <linux/v4l2-mediabus.h>
34 #include <media/v4l2-common.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
95 struct clk *clk; member
158 msg[0].addr = client->addr; in __mt9t112_reg_read()
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Dimx296.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
196 struct clk *clk; member
222 ret = regmap_raw_read(sensor->regmap, addr & IMX296_REG_ADDR_MASK, data, in imx296_read()
238 ret = regmap_raw_write(sensor->regmap, addr & IMX296_REG_ADDR_MASK, in imx296_write()
241 dev_err(sensor->dev, "%u-bit write to 0x%04x failed: %d\n", in imx296_write()
255 ret = regulator_bulk_enable(ARRAY_SIZE(sensor->supplies), in imx296_power_on()
[all …]
Dmt9v032.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk.h>
24 #include <linux/v4l2-mediabus.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-fwnode.h>
31 #include <media/v4l2-subdev.h>
204 struct clk *clk; member
229 struct regmap *map = mt9v032->regmap; in mt9v032_update_aec_agc()
230 u16 value = mt9v032->aec_agc; in mt9v032_update_aec_agc()
[all …]
Dtw9910.c1 // SPDX-License-Identifier: GPL-2.0
13 * Copyright 2006-7 Jonathan Corbet <[email protected]>
18 #include <linux/clk.h>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-subdev.h>
136 #define IFSEL_S 0x10 /* 01 : S-video decoding */
146 /* 1 : ITU-R-656 compatible data sequence format */
147 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
148 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
150 /* 0 : free-run output mode */
[all …]
/linux-6.14.4/include/linux/mfd/
Dimx25-tsadc.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 struct clk;
11 struct clk *clk; member
54 _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
103 /* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
107 #define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16)
118 #define MX25_ADCQ_CFG_REFP(sel) ((sel) << 7) argument
124 #define MX25_ADCQ_CFG_IN(sel) ((sel) << 4) argument
133 #define MX25_ADCQ_CFG_REFN(sel) ((sel) << 2) argument
/linux-6.14.4/drivers/mmc/host/
Dsdhci_am654.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
8 #include <linux/clk.h>
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
108 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
109 "ti,itap-del-sel-legacy",
111 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
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/linux-6.14.4/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dphy_shim.c18 * This is "two-way" interface, acting as the SHIM layer between driver
20 * to do some preprocessing, then reach PHY. On the PHY->driver direction,
35 struct brcms_info *wl; /* pointer to os-specific private state */
47 physhim->wlc_hw = wlc_hw; in wlc_phy_shim_attach()
48 physhim->wlc = wlc; in wlc_phy_shim_attach()
49 physhim->wl = wl; in wlc_phy_shim_attach()
64 brcms_init_timer(physhim->wl, fn, arg, name); in wlapi_init_timer()
85 brcms_intrson(physhim->wl); in wlapi_intrson()
90 return brcms_intrsoff(physhim->wl); in wlapi_intrsoff()
95 brcms_intrsrestore(physhim->wl, macintmask); in wlapi_intrsrestore()
[all …]
/linux-6.14.4/drivers/regulator/
Dti-abb-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Copyright (C) 2012-2013 Texas Instruments, Inc.
12 #include <linux/clk.h>
26 * FAST_OPP: sets ABB LDO to Forward Body-Bias
27 * SLOW_OPP: sets ABB LDO to Reverse Body-Bias
34 * struct ti_abb_info - ABB information per voltage setting
47 * struct ti_abb_reg - Register description for ABB block
50 * @sr2_wtcnt_value_mask: setup register- sr2_wtcnt_value mask
51 * @fbb_sel_mask: setup register- FBB sel mask
52 * @rbb_sel_mask: setup register- RBB sel mask
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/linux-6.14.4/Documentation/devicetree/bindings/i2c/
Di2c-cbus-gpio.txt1 Device tree bindings for i2c-cbus-gpio driver
4 - compatible = "i2c-cbus-gpio";
5 - gpios: clk, dat, sel
6 - #address-cells = <1>;
7 - #size-cells = <0>;
10 - child nodes conforming to i2c bus binding
15 compatible = "i2c-cbus-gpio";
16 gpios = <&gpio 66 0 /* clk */
18 &gpio 64 0 /* sel */
20 #address-cells = <1>;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Leilk Liu <[email protected]>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - items:
19 - enum:
20 - mediatek,mt7629-spi
21 - mediatek,mt8365-spi
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/linux-6.14.4/drivers/media/platform/qcom/camss/
Dcamss-vfe.c1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
10 #include <linux/clk.h>
21 #include <media/media-entity.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-subdev.h>
25 #include "camss-vfe.h"
[all …]
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt7981b.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/reset/mt7986-resets.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a53";
[all …]
/linux-6.14.4/sound/soc/meson/
Dt9015.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk.h>
56 struct snd_soc_component *component = dai->component; in t9015_dai_set_fmt()
69 return -EINVAL; in t9015_dai_set_fmt()
76 return -EINVAL; in t9015_dai_set_fmt()
86 .name = "t9015-hifi",
100 static const DECLARE_TLV_DB_MINMAX_MUTE(dac_vol_tlv, -9525, 0);
137 SND_SOC_DAPM_MUX("Right DAC Sel", SND_SOC_NOPM, 0, 0,
139 SND_SOC_DAPM_MUX("Left DAC Sel", SND_SOC_NOPM, 0, 0,
143 SND_SOC_DAPM_OUT_DRV("Right- Driver", BLOCK_EN, LORN_EN, 0,
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/linux-6.14.4/drivers/net/ethernet/broadcom/asp2/
Dbcmasp.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/io-64-nonatomic-hi-lo.h>
81 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100) argument
83 #define ASP_RX_FILTER_MDA_CFG_UMC_SEL(sel) ((sel) > 1 ? BIT(17) : \ argument
84 BIT((sel) + 9))
85 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104) argument
86 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108) argument
87 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c) argument
88 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110) argument
89 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100) argument
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