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/linux-6.14.4/drivers/irqchip/
Dirq-ti-sci-inta.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
24 #include <asm-generic/msi.h>
44 * struct ti_sci_inta_event_desc - Description of an event coming to
59 * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
78 * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
80 * @sci: Pointer to TISCI handle
87 * @ti_sci_id: TI-SCI device identifier
89 * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
92 * they are converted to Global event within INTA to be
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
181 will be called irq-lan966x-oic.
222 bool "J-Core integrated AIC" if COMPILE_TEST
226 Support for the J-Core integrated AIC.
237 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
240 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
245 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
302 tristate "TS-4800 IRQ controller"
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dti,sci-inta.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lokesh Vutla <[email protected]>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
16 The Interrupt Aggregator (INTA) provides a centralized machine
22 +-----------------------------------------+
24 | +--------------+ +------------+ |
25 m ------>| | vint | bit | | 0 |.....|63| vint0 |
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Dti,sci-intr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lokesh Vutla <[email protected]>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
22 +----------------------+
24 +-------+ | +------+ +-----+ |
25 | GPIO |----------->| | irq0 | | 0 | | Host IRQ
26 +-------+ | +------+ +-----+ | controller
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/linux-6.14.4/include/linux/soc/ti/
Dti_sci_inta_msi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Texas Instruments' K3 TI SCI INTA MSI helper
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
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Dk3-am62p-j722s-common-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 gic500: interrupt-controller@1800000 {
16 compatible = "arm,gic-v3";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 #interrupt-cells = <3>;
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Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
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Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
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Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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Dk3-j784s4-j742s2-main-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
12 #include "k3-serdes.h"
15 serdes_refclk: clock-serdes {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
29 compatible = "mmio-sram";
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Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
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/linux-6.14.4/arch/parisc/include/asm/
Dsuperio.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */
28 #define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */
34 #define OCW2_EOI 0x20 /* Non-specific EOI */
79 (((x)->vendor == PCI_VENDOR_ID_NS) && \
80 ( ((x)->device == PCI_DEVICE_ID_NS_87415) \
81 || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \
82 || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) )
/linux-6.14.4/arch/powerpc/platforms/
Dfsl_uli1575.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ULI M1575 setup code - specific to Freescale boards
15 #include <asm/pci-bridge.h>
16 #include <asm/ppc-pci.h>
78 dev->class |= 0x1; in early_uli5249()
102 /* USB 1.1 OHCI controller 1: dev 28, func 0 - IRQ12 */ in quirk_uli1575()
105 /* USB 1.1 OHCI controller 2: dev 28, func 1 - IRQ9 */ in quirk_uli1575()
108 /* USB 1.1 OHCI controller 3: dev 28, func 2 - IRQ10 */ in quirk_uli1575()
111 /* Lan controller: dev 27, func 0 - IRQ6 */ in quirk_uli1575()
114 /* AC97 Audio controller: dev 29, func 0 - IRQ6 */ in quirk_uli1575()
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/linux-6.14.4/arch/x86/pci/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Support for PC -- Routing of Interrupts
5 * (c) 1999--2000 Martin Mares <[email protected]>
22 #include <asm/pc-conf-reg.h>
81 if (rt->signature != PIRQ_SIGNATURE || in pirq_check_routing_table()
82 rt->version != PIRQ_VERSION || in pirq_check_routing_table()
83 rt->size % 16 || in pirq_check_routing_table()
84 rt->size < sizeof(struct irq_routing_table) || in pirq_check_routing_table()
85 (limit && rt->size > limit - addr)) in pirq_check_routing_table()
88 for (i = 0; i < rt->size; i++) in pirq_check_routing_table()
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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