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Searched +full:s500 +full:- +full:timer (Results 1 – 10 of 10) sorted by relevance

/linux-6.14.4/arch/arm/boot/dts/actions/
Dowl-s500.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Actions Semi S500 SoC
5 * Copyright (c) 2016-2017 Andreas Färber
8 #include <dt-bindings/clock/actions,s500-cmu.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/owl-s500-powergate.h>
12 #include <dt-bindings/reset/actions,s500-reset.h>
15 compatible = "actions,s500";
16 interrupt-parent = <&gic>;
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Dowl-s500-guitar.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (c) 2016-2017 Andreas Färber
8 #include "owl-s500.dtsi"
11 compatible = "lemaker,guitar", "actions,s500";
19 &timer {
Dowl-s500-labrador-v2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (c) 2019-2020 Matheus Castello
8 #include "owl-s500.dtsi"
12 compatible = "caninos,labrador-v2", "actions,s500";
20 &timer {
Dowl-s500-cubieboard6.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "owl-s500.dtsi"
13 compatible = "cubietech,cubieboard6", "actions,s500";
21 stdout-path = "serial3:115200n8";
30 &timer {
Dowl-s500-sparky.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "owl-s500.dtsi"
13 compatible = "allo,sparky", "actions,s500";
21 stdout-path = "serial3:115200n8";
30 &timer {
Dowl-s500-roseapplepi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (C) 2020-2021 Cristian Ciocaltea <[email protected]>
8 /dts-v1/;
10 #include "owl-s500.dtsi"
13 compatible = "roseapplepi,roseapplepi", "actions,s500";
22 stdout-path = "serial2:115200n8";
30 syspwr: regulator-5v0 {
31 compatible = "regulator-fixed";
32 regulator-name = "SYSPWR";
33 regulator-min-microvolt = <5000000>;
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/linux-6.14.4/Documentation/devicetree/bindings/timer/
Dactions,owl-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/timer/actions,owl-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Actions Semi Owl timer
10 - Andreas Färber <[email protected]>
14 The 32bit timers support dynamic irq, as well as one-shot mode.
19 - actions,s500-timer
20 - actions,s700-timer
21 - actions,s900-timer
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/linux-6.14.4/arch/arm/mach-actions/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <linux/soc/actions/owl-sps.h>
45 return -EINVAL; in s500_wakeup_secondary()
69 timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4); in s500_wakeup_secondary()
71 timer_base_addr + OWL_CPU1_FLAG + (cpu - 1) * 4); in s500_wakeup_secondary()
91 writel(0, timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4); in s500_smp_boot_secondary()
92 writel(0, timer_base_addr + OWL_CPU1_FLAG + (cpu - 1) * 4); in s500_smp_boot_secondary()
101 node = of_find_compatible_node(NULL, NULL, "actions,s500-timer"); in s500_smp_prepare_cpus()
103 pr_err("%s: missing timer\n", __func__); in s500_smp_prepare_cpus()
109 pr_err("%s: could not map timer registers\n", __func__); in s500_smp_prepare_cpus()
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/linux-6.14.4/drivers/clocksource/
Dtimer-owl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Actions Semi Owl timer
111 evt->event_handler(evt); in owl_timer1_interrupt()
122 owl_timer_base = of_io_request_and_map(node, 0, "owl-timer"); in owl_timer_init()
124 pr_err("Can't map timer registers\n"); in owl_timer_init()
134 return -EINVAL; in owl_timer_init()
150 ret = clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name, in owl_timer_init()
160 "owl-timer", &owl_clockevent); in owl_timer_init()
174 TIMER_OF_DECLARE(owl_s500, "actions,s500-timer", owl_timer_init);
175 TIMER_OF_DECLARE(owl_s700, "actions,s700-timer", owl_timer_init);
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/linux-6.14.4/Documentation/admin-guide/
Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
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