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/linux-6.14.4/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dfsl,ucc-hdlc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: High-Level Data Link Control(HDLC)
12 - Frank Li <[email protected]>
16 const: fsl,ucc-hdlc
24 cell-index:
27 rx-clock-name:
30 - pattern: "^brg([0-9]|1[0-6])$"
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/linux-6.14.4/drivers/soc/fsl/qe/
Dqe_tdm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * QE TDM API Set - TDM specific routines implementations.
22 return -EINVAL; in set_tdm_framer()
27 struct si_mode_info *si_info = &ut_info->si_info; in set_si_param()
29 if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) { in set_si_param()
30 si_info->simr_crt = 1; in set_si_param()
31 si_info->simr_rfsd = 0; in set_si_param()
42 sprop = of_get_property(np, "fsl,rx-sync-clock", NULL); in ucc_of_parse_tdm()
44 ut_info->uf_info.rx_sync = qe_clock_source(sprop); in ucc_of_parse_tdm()
45 if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) || in ucc_of_parse_tdm()
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-ls1043a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
26 stdout-path = "serial0:115200n8";
36 shunt-resistor = <1000>;
67 #address-cells = <2>;
68 #size-cells = <1>;
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/linux-6.14.4/include/linux/
Dpxa2xx_ssp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * This driver supports the following PXA CPU/SSP ports:-
42 #define SSTSA (0x30) /* SSP Tx Timeslot Active */
43 #define SSRSA (0x34) /* SSP Rx Timeslot Active */
44 #define SSTSS (0x38) /* SSP Timeslot Status */
49 #define SSCR0_DSS GENMASK(3, 0) /* Data Size Select (mask) */
50 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */
51 #define SSCR0_FRF GENMASK(5, 4) /* FRame Format (mask) */
57 #define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */
62 #define SSCR0_RIM BIT(22) /* Receive FIFO overrun interrupt mask */
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/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dt104xrdb.dtsi4 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
47 bman_fbpr: bman-fbpr {
51 qman_fqd: qman-fqd {
55 qman_pfdr: qman-pfdr {
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "cfi-flash";
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Dt104xd4rdb.dtsi36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
41 bman_fbpr: bman-fbpr {
45 qman_fqd: qman-fqd {
49 qman_pfdr: qman-pfdr {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "cfi-flash";
66 bank-width = <2>;
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Dt104xqds.dtsi4 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
37 #address-cells = <2>;
38 #size-cells = <2>;
39 interrupt-parent = <&mpic>;
68 reserved-memory {
69 #address-cells = <2>;
70 #size-cells = <2>;
73 bman_fbpr: bman-fbpr {
77 qman_fqd: qman-fqd {
81 qman_pfdr: qman-pfdr {
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/linux-6.14.4/sound/soc/codecs/
Dmc13783.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <sound/soc-dapm.h>
97 struct snd_soc_component *component = dai->component; in mc13783_pcm_hw_params_dac()
109 return -EINVAL; in mc13783_pcm_hw_params_dac()
116 struct snd_soc_component *component = dai->component; in mc13783_pcm_hw_params_codec()
128 return -EINVAL; in mc13783_pcm_hw_params_codec()
141 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in mc13783_pcm_hw_params_sync()
150 struct snd_soc_component *component = dai->component; in mc13783_set_fmt()
152 unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV | in mc13783_set_fmt() local
165 return -EINVAL; in mc13783_set_fmt()
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Didt821034.c1 // SPDX-License-Identifier: GPL-2.0
28 u8 spi_tx_buf; /* Cannot use stack area for SPI (dma-safe memory) */
29 u8 spi_rx_buf; /* Cannot use stack area for SPI (dma-safe memory) */
55 .tx_buf = &idt821034->spi_tx_buf, in idt821034_8bit_write()
59 .tx_buf = &idt821034->spi_tx_buf, in idt821034_8bit_write()
64 idt821034->spi_tx_buf = val; in idt821034_8bit_write()
66 dev_vdbg(&idt821034->spi->dev, "spi xfer wr 0x%x\n", val); in idt821034_8bit_write()
68 return spi_sync_transfer(idt821034->spi, xfer, 2); in idt821034_8bit_write()
85 .tx_buf = &idt821034->spi_tx_buf, in idt821034_8bit_read()
86 .rx_buf = &idt821034->spi_rx_buf, in idt821034_8bit_read()
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/linux-6.14.4/drivers/net/wan/
Dfarsync.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards
23 * used with the FarSite T-Series cards (T2P & T4P) running in the high
30 * purpose (FarSite T-series).
121 unsigned char lineBuildOut; /* 0, -7.5, -15, -22 */
126 unsigned char rxBufferMode; /* rx elastic buffer depth */
128 unsigned char idleCode; /* Value to send as idle timeslot */
129 unsigned int receiveBufferDelay; /* delay thro rx buffer timeslots */
328 extern int fst_debug_mask; /* Bit mask of actions to debug, bits
/linux-6.14.4/drivers/isdn/hardware/mISDN/
Dhfcmulti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * hfcmulti.c low level driver for hfc-4s/hfc-8s/hfc-e1 based cards
7 * Peter Sprenger (sprengermoving-bytes.de)
9 * inspired by existing hfc-pci driver:
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
22 * Bit 0-7 = 0x00001 = HFC-E1 (1 port)
23 * or Bit 0-7 = 0x00004 = HFC-4S (4 ports)
24 * or Bit 0-7 = 0x00008 = HFC-8S (8 ports)
26 * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware
38 * example: 0x20204 one HFC-4S with dtmf detection and 128 timeslots on PCM
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/linux-6.14.4/sound/soc/pxa/
Dpxa-ssp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa-ssp.c -- ALSA Soc Audio Layer
30 #include <sound/pxa2xx-lib.h>
33 #include "pxa-ssp.h"
55 dev_dbg(ssp->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n", in dump_registers()
59 dev_dbg(ssp->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n", in dump_registers()
67 dma->addr_width = width4 ? DMA_SLAVE_BUSWIDTH_4_BYTES : in pxa_ssp_set_dma_params()
69 dma->maxburst = 16; in pxa_ssp_set_dma_params()
70 dma->addr = ssp->phys_base + SSDR; in pxa_ssp_set_dma_params()
77 struct ssp_device *ssp = priv->ssp; in pxa_ssp_startup()
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