Home
last modified time | relevance | path

Searched +full:rtl9300 +full:- +full:gpio (Results 1 – 7 of 7) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/gpio/
Drealtek,otto-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/realtek,otto-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek Otto GPIO controller
10 - Sander Vanheule <[email protected]>
11 - Bert Vermeulen <[email protected]>
14 Realtek's GPIO controller on their MIPS switch SoCs (Otto platform) consists
15 of two banks of 32 GPIOs. These GPIOs can generate edge-triggered interrupts.
20 allows for GPIO port use.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/mfd/
Drealtek,rtl9301-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/realtek,rtl9301-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <[email protected]>
13 The RTL9300 is a series of is an Ethernet switches with an integrated CPU. A
20 - enum:
21 - realtek,rtl9301-switch
22 - realtek,rtl9302b-switch
23 - realtek,rtl9302c-switch
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/i2c/
Drealtek,rtl9301-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/realtek,rtl9301-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <[email protected]>
13 The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which
14 if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be
20 - items:
21 - enum:
22 - realtek,rtl9302b-i2c
[all …]
/linux-6.14.4/drivers/gpio/
Dgpio-realtek-otto.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/gpio/driver.h>
29 /* Two bits per GPIO in IMR registers */
42 * realtek_gpio_ctrl - Realtek Otto GPIO driver data
45 * @base: Base address of the register block for a GPIO bank
49 * @bank_read: Read a bank setting as a single 32-bit value
50 * @bank_write: Write a bank setting as a single 32-bit value
53 * The DIR, DATA, and ISR registers consist of four 8-bit port values, packed
54 * into a single 32-bit register. Use @bank_read (@bank_write) to get (assign)
55 * a value from (to) these registers. The IMR register consists of four 16-bit
[all …]
/linux-6.14.4/drivers/i2c/busses/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
51 will be called i2c-ali15x3.
63 will be called i2c-amd756.
73 will be called i2c-amd8111.
83 be called i2c-amd-mp2-pci and i2c-amd-mp2-plat.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o
13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
17 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
18 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
19 obj-$(CONFIG_I2C_I801) += i2c-i801.o
[all …]
/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
[all …]