/linux-6.14.4/arch/arm/boot/dts/ti/omap/ |
D | omap4-var-som-om44.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2012 Variscite Ltd. - https://www.variscite.com 7 #include "omap4-mcpdm.dtsi" 10 model = "Variscite VAR-SOM-OM44"; 11 compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; 19 compatible = "ti,abe-twl6040"; 20 ti,model = "VAR-SOM-OM44"; 22 ti,mclk-freq = <38400000>; 27 ti,audio-routing = 36 compatible = "usb-nop-xceiv"; [all …]
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/linux-6.14.4/arch/arm/boot/dts/nxp/imx/ |
D | imx6ul-tqma6ul2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 #include "imx6ul-tqma6ul-common.dtsi" 9 #include "imx6ul-tqma6ulx-common.dtsi" 12 model = "TQ-Systems TQMa6UL2 SoM"; 13 compatible = "tq,imx6ul-tqma6ul2", "fsl,imx6ul"; 17 fsl,tuning-step = <6>; 22 fsl,pins = < 33 /* rst */ [all …]
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D | imx6ul-tqma6ul2l.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 #include "imx6ul-tqma6ul-common.dtsi" 9 #include "imx6ul-tqma6ulxl-common.dtsi" 12 model = "TQ-Systems TQMa6UL2L SoM"; 13 compatible = "tq,imx6ul-tqma6ul2l", "fsl,imx6ul"; 17 fsl,tuning-step = <6>; 22 fsl,pins = < 33 /* rst */ [all …]
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D | imx6ull-tqma6ull2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 #include "imx6ul-tqma6ul-common.dtsi" 9 #include "imx6ul-tqma6ulx-common.dtsi" 12 model = "TQ-Systems TQMa6ULL2 SoM"; 13 compatible = "tq,imx6ull-tqma6ull2", "fsl,imx6ull"; 17 fsl,tuning-step = <6>; 19 max-frequency = <99000000>; 20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; [all …]
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D | imx6ull-tqma6ull2l.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 #include "imx6ul-tqma6ul-common.dtsi" 9 #include "imx6ul-tqma6ulxl-common.dtsi" 13 compatible = "tq,imx6ull-tqma6ull2l", "fsl,imx6ull"; 17 fsl,tuning-step = <6>; 19 max-frequency = <99000000>; 20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; 21 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; [all …]
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D | imx7d-mba7.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Device Tree Source for TQ-Systems TQMa7D board on MBa7 carrier board. 5 * Copyright (C) 2016 TQ-Systems GmbH 6 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 10 /dts-v1/; 12 #include "imx7d-tqma7.dtsi" 13 #include "imx7-mba7.dtsi" 16 model = "TQ-Systems TQMa7D board on MBa7 carrier board"; 17 compatible = "tq,imx7d-mba7", "tq,imx7d-tqma7", "fsl,imx7d"; 21 pinctrl-names = "default"; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/mediatek/ |
D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 14 compatible = "sony,xperia-m5", "mediatek,mt6795"; 15 chassis-type = "handset"; 26 compatible = "led-backlight"; 29 default-brightness-level = <300>; 32 led-controller-display { 33 compatible = "pwm-leds"; 35 disp_led_pwm: led-0 { [all …]
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D | mt7986a-bananapi-bpi-r3-mini.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Authors: Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/pinctrl/mt65xx.h> 19 model = "Bananapi BPI-R3 Mini"; 20 chassis-type = "embedded"; 21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a"; [all …]
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D | mt8188-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188"; 26 stdout-path = "serial0:115200n8"; 34 reserved_memory: reserved-memory { 35 #address-cells = <2>; 36 #size-cells = <2>; 40 compatible = "shared-dma-pool"; 42 no-map; 52 pinctrl-names = "default"; [all …]
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D | mt7986a-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/pinctrl/mt65xx.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 22 stdout-path = "serial0:115200n8"; 30 reg_1p8v: regulator-1p8v { 31 compatible = "regulator-fixed"; 32 regulator-name = "fixed-1.8V"; 33 regulator-min-microvolt = <1800000>; [all …]
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/linux-6.14.4/Documentation/hwmon/ |
D | ucd9000.rst | 11 Addresses scanned: - 15 - http://focus.ti.com/lit/ds/symlink/ucd90120.pdf 16 - http://focus.ti.com/lit/ds/symlink/ucd90124.pdf 17 - http://focus.ti.com/lit/ds/symlink/ucd90160.pdf 18 - http://focus.ti.com/lit/ds/symlink/ucd90320.pdf 19 - http://focus.ti.com/lit/ds/symlink/ucd9090.pdf 20 - http://focus.ti.com/lit/ds/symlink/ucd90910.pdf 22 Author: Guenter Roeck <linux@roeck-us.net> 26 ----------- 31 sequences up to 12 independent voltage rails. The device integrates a 12-bit [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
D | mediatek,mt7621-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <[email protected]> 11 - Sergio Paracuellos <[email protected]> 16 pins is not supported. There is no pinconf support. 20 const: ralink,mt7621-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': [all …]
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D | mediatek,mt7620-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <[email protected]> 11 - Sergio Paracuellos <[email protected]> 16 pins is not supported. There is no pinconf support. 20 const: ralink,mt7620-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': [all …]
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/linux-6.14.4/arch/arm64/boot/dts/rockchip/ |
D | rk3588-ok3588-c.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 4 #include "rk3588-fet3588-c.dtsi" 7 model = "Forlinx OK3588-C Board"; 8 compatible = "forlinx,ok3588-c", "forlinx,fet3588-c", "rockchip,rk3588"; 16 adc-keys-0 { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 0>; 19 io-channel-names = "buttons"; 20 keyup-threshold-microvolt = <1800000>; [all …]
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D | rk3588-armsom-w3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 7 #include "rk3588-armsom-lm7.dtsi" 18 analog-sound { 19 compatible = "audio-graph-card"; 20 label = "rk3588-es8316"; 30 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 31 pinctrl-names = "default"; [all …]
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D | rk3576-armsom-sige5.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/pwm/pwm.h> 13 #include <dt-bindings/usb/pd.h> 26 stdout-path = "serial0:1500000n8"; 30 compatible = "gpio-leds"; 32 green_led: green-led { [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | imx8mm-kontron-bl.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 /dts-v1/; 8 #include "imx8mm-kontron-sl.dtsi" 12 compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm"; 21 osc_can: clock-osc-can { 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <16000000>; 25 clock-output-names = "osc-can"; 28 hdmi-out { [all …]
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D | imx8mm-iot-gateway.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 #include "imx8mm-ucm-som.dtsi" 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 9 compatible = "compulab,imx8mm-iot-gateway", "compulab,imx8mm-ucm-som", "fsl,imx8mm"; 11 regulator-usbhub-ena { 12 compatible = "regulator-fixed"; 13 regulator-name = "usbhub_ena"; 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 17 enable-active-high; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/arm/tegra/ |
D | nvidia,tegra186-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <[email protected]> 11 - Jon Hunter <[email protected]> 16 - nvidia,tegra186-pmc 17 - nvidia,tegra194-pmc 18 - nvidia,tegra234-pmc 24 reg-names: [all …]
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/linux-6.14.4/arch/arm64/boot/dts/hisilicon/ |
D | hikey970-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/pinctrl/hisi.h> 10 range: gpio-range { 11 #pinctrl-single,gpio-range-cells = <3>; 15 compatible = "pinctrl-single"; 17 #pinctrl-cells = <1>; 18 #gpio-range-cells = <0x3>; 19 pinctrl-single,register-width = <0x20>; 20 pinctrl-single,function-mask = <0x7>; 21 /* pin base, nr pins & gpio function */ [all …]
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D | hikey960-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/pinctrl/hisi.h> 12 range: gpio-range { 13 #pinctrl-single,gpio-range-cells = <3>; 17 compatible = "pinctrl-single"; 19 #pinctrl-cells = <1>; 20 #gpio-range-cells = <0x3>; 21 pinctrl-single,register-width = <0x20>; 22 pinctrl-single,function-mask = <0x7>; 23 /* pin base, nr pins & gpio function */ [all …]
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/linux-6.14.4/sound/soc/stm/ |
D | stm32_sai.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 35 * - STM32H7: rely on default settings 36 * - STM32MP1: retrieve settings from registers 47 * - do not use SAI parent clock source selection 48 * - do not use DMA burst mode 55 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 }, 56 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 }, 57 { .compatible = "st,stm32mp25-sai", .data = (void *)&stm32_sai_conf_mp25 }, 65 clk_disable_unprepare(sai->pclk); in stm32_sai_pclk_disable() [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/reset/ |
D | renesas,rst.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/renesas,rst.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car and RZ/G Reset Controller 10 - Geert Uytterhoeven <[email protected]> 11 - Magnus Damm <[email protected]> 14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the 16 - Latching of the levels on mode pins when PRESET# is negated, 17 - Mode monitoring register, [all …]
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/linux-6.14.4/drivers/pinctrl/ |
D | pinctrl-falcon.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/drivers/pinctrl/pinmux-falcon.c 4 * based on linux/drivers/pinctrl/pinmux-pxa910.c 22 #include "pinctrl-lantiq.h" 47 #define PINS 32 macro 48 #define PORT(x) (x / PINS) 49 #define PORT_PIN(x) (x % PINS) 67 .pins = p, \ 90 static struct pinctrl_pin_desc falcon_pads[PORTS * PINS]; 95 int base = bank * PINS; in lantiq_load_pin_desc() [all …]
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/linux-6.14.4/arch/arm/boot/dts/st/ |
D | ste-hrefv60plus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2012 ST-Ericsson AB 6 #include "ste-href.dtsi" 9 model = "ST-Ericsson HREF (v60+) platform with Device Tree"; 10 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; 12 thermal-zones { 13 chassis-thermal { 15 polling-delay = <20000>; 17 polling-delay-passive = <2000>; 19 thermal-sensors = <&therm1>, <&therm2>; [all …]
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