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Searched +full:rmii +full:- +full:rxc (Results 1 – 6 of 6) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/net/
Dmediatek,star-emac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <[email protected]>
14 It's compliant with 802.3 standards and supports half- and full-duplex
15 modes with flow-control as well as CRC offloading and VLAN tags.
18 - $ref: ethernet-controller.yaml#
23 - mediatek,mt8516-eth
24 - mediatek,mt8518-eth
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Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biao Huang <[email protected]>
21 - mediatek,mt2712-gmac
22 - mediatek,mt8188-gmac
23 - mediatek,mt8195-gmac
25 - compatible
28 - $ref: snps,dwmac.yaml#
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/linux-6.14.4/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
114 int rmii_clk_from_mac = plat->rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0; in mt2712_set_interface()
115 int rmii_rxc = plat->rmii_rxc ? RMII_CLK_SRC_RXC : 0; in mt2712_set_interface()
119 switch (plat->phy_mode) { in mt2712_set_interface()
133 dev_err(plat->dev, "phy interface not supported\n"); in mt2712_set_interface()
134 return -EINVAL; in mt2712_set_interface()
137 regmap_write(plat->peri_regmap, PERI_ETH_PHY_INTF_SEL, intf_val); in mt2712_set_interface()
144 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mt2712_delay_ps2stage()
146 switch (plat->phy_mode) { in mt2712_delay_ps2stage()
149 /* 550ps per stage for MII/RMII */ in mt2712_delay_ps2stage()
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/linux-6.14.4/drivers/net/dsa/sja1105/
Dsja1105_clocking.c1 // SPDX-License-Identifier: BSD-3-Clause
2 /* Copyright 2016-2018 NXP
3 * Copyright (c) 2018-2019, Vladimir Oltean <[email protected]>
107 sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op); in sja1105_cgu_idiv_packing()
108 sja1105_packing(buf, &idiv->autoblock, 11, 11, size, op); in sja1105_cgu_idiv_packing()
109 sja1105_packing(buf, &idiv->idiv, 5, 2, size, op); in sja1105_cgu_idiv_packing()
110 sja1105_packing(buf, &idiv->pd, 0, 0, size, op); in sja1105_cgu_idiv_packing()
116 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_idiv_config()
117 struct device *dev = priv->ds->dev; in sja1105_cgu_idiv_config()
121 if (regs->cgu_idiv[port] == SJA1105_RSV_ADDR) in sja1105_cgu_idiv_config()
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/linux-6.14.4/drivers/net/ethernet/mediatek/
Dmtk_star_emac.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/dma-mapping.h>
77 /* Flow-Control Configuration Register */
133 /* Delay-Macro Register */
201 * reuse the same structure for both TX and RX - the layout is the same, only
291 return priv->ndev->dev.parent; in mtk_star_get_dev()
305 ring->descs = descs; in mtk_star_ring_init()
306 ring->head = 0; in mtk_star_ring_init()
307 ring->tail = 0; in mtk_star_ring_init()
313 struct mtk_star_ring_desc *desc = &ring->descs[ring->tail]; in mtk_star_ring_pop_tail()
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/linux-6.14.4/drivers/net/phy/
Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
126 * The value is calculated as following: (1/1000000)/((2^-32)/4)
132 * The value is calculated as following: (1/1000000)/((2^-32)/8)
527 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
531 if (type && type->interrupt_level_mask) in kszphy_config_intr()
532 mask = type->interrupt_level_mask; in kszphy_config_intr()
544 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
607 return -EINVAL; in kszphy_setup_led()
627 * unique (non-broadcast) address on a shared bus.
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