Searched +full:rk3568 +full:- +full:rng (Results 1 – 6 of 6) sorted by relevance
| /linux-6.14.4/Documentation/devicetree/bindings/rng/ |
| D | rockchip,rk3568-rng.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/rockchip,rk3568-rng.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3568 TRNG
9 description: True Random Number Generator on Rockchip RK3568 SoC
12 - Aurelien Jarno <[email protected]>
13 - Daniel Golle <[email protected]>
18 - rockchip,rk3568-rng
25 - description: TRNG clock
[all …]
|
| /linux-6.14.4/drivers/char/hw_random/ |
| D | rockchip-rng.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * rockchip-rng.c True Random Number Generator driver for Rockchip RK3568 SoC
8 * Lin Jinhan <troy.lin@rock-chips.com>
31 * of ~900 (~87.5% of FIPS 140-2 successes).
35 /* TRNG registers from RK3568 TRM-Part2, section 5.4.1 */
53 struct hwrng rng; member
60 static void rk_rng_write_ctl(struct rk_rng *rng, u32 val, u32 mask) in rk_rng_write_ctl() argument
62 writel((mask << 16) | val, rng->base + TRNG_RNG_CTL); in rk_rng_write_ctl()
65 static int rk_rng_init(struct hwrng *rng) in rk_rng_init() argument
67 struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng); in rk_rng_init()
[all …]
|
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Hardware Random Number Generator (RNG) configuration
13 module will be called rng-core. This provides a device
28 This driver provides kernel-side support for a generic Random
31 the default FPGA bitstream on the TS-7800 has such functionality.
34 module will be called timeriomem-rng.
43 This driver provides kernel-side support for the Random Number
44 Generator hardware found on Intel i8xx-based motherboards.
47 module will be called intel-rng.
57 This driver provides kernel-side support for the Random Number
[all …]
|
| /linux-6.14.4/arch/arm64/boot/dts/rockchip/ |
| D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk356x-base.dtsi"
9 compatible = "rockchip,rk3568";
11 cpu0_opp_table: opp-table-0 {
12 compatible = "operating-points-v2";
13 opp-shared;
15 opp-408000000 {
16 opp-hz = /bits/ 64 <408000000>;
17 opp-microvolt = <850000 850000 1150000>;
18 clock-latency-ns = <40000>;
[all …]
|
| D | rk356x-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
|
| /linux-6.14.4/ |
| D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
[all …]
|