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Searched +full:rk3368 +full:- +full:power (Results 1 – 24 of 24) sorted by relevance

/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3368-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "rockchip,rk3368";
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Drk3368-px5-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368.dtsi"
8 #include <dt-bindings/input/input.h>
12 compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
20 stdout-path = "serial4:115200n8";
28 keys: gpio-keys {
29 compatible = "gpio-keys";
30 pinctrl-names = "default";
31 pinctrl-0 = <&pwr_key>;
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Drk3368-geekbox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368.dtsi"
8 #include <dt-bindings/input/input.h>
12 compatible = "geekbuying,geekbox", "rockchip,rk3368";
20 stdout-path = "serial2:115200n8";
28 ext_gmac: gmac-clk {
29 compatible = "fixed-clock";
30 clock-frequency = <125000000>;
31 clock-output-names = "ext_gmac";
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Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368.dtsi"
8 #include <dt-bindings/input/input.h>
12 compatible = "rockchip,r88", "rockchip,rk3368";
21 stdout-path = "serial2:115200n8";
29 emmc_pwrseq: emmc-pwrseq {
30 compatible = "mmc-pwrseq-emmc";
31 pinctrl-0 = <&emmc_reset>;
32 pinctrl-names = "default";
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Drk3368-orion-r68-meta.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include "rk3368.dtsi"
12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
21 stdout-path = "serial2:115200n8";
29 emmc_pwrseq: emmc-pwrseq {
30 compatible = "mmc-pwrseq-emmc";
31 pinctrl-0 = <&emmc_reset>;
32 pinctrl-names = "default";
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Drk3368-lion.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368.dtsi"
16 stdout-path = "serial0:115200n8";
19 ext_gmac: gmac-clk {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
23 #clock-cells = <0>;
27 compatible = "i2c-mux-gpio";
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Drk3368-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3368.dtsi"
17 stdout-path = "serial2:115200n8";
26 compatible = "pwm-backlight";
27 brightness-levels = <
60 default-brightness-level = <128>;
61 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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Drk3368-lba3368.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/clock/rockchip,rk808.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/sound/rt5640.h>
9 #include "rk3368.dtsi"
13 compatible = "neardi,lba3368", "rockchip,rk3368";
25 stdout-path = "serial1:115200n8";
33 adc-key {
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/linux-6.14.4/Documentation/devicetree/bindings/soc/rockchip/
Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <[email protected]>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3566-pipe-grf
19 - rockchip,rk3568-pcie3-phy-grf
20 - rockchip,rk3568-pipe-grf
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/linux-6.14.4/Documentation/devicetree/bindings/power/
Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <[email protected]>
29 should have power or not have power
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
50 - rockchip,rk3188-io-voltage-domain
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Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <[email protected]>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
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/linux-6.14.4/Documentation/devicetree/bindings/arm/rockchip/
Dpmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Management Unit (PMU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <[email protected]>
14 The PMU is used to turn on and off different power domains of the SoCs.
15 This includes the power to the CPU cores.
22 - rockchip,px30-pmu
23 - rockchip,rk3066-pmu
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Drockchip-inno-csi-dphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY
10 - Heiko Stuebner <[email protected]>
13 The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP which
19 - rockchip,px30-csi-dphy
20 - rockchip,rk1808-csi-dphy
21 - rockchip,rk3326-csi-dphy
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Drockchip,px30-dsi-dphy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <[email protected]>
13 "#phy-cells":
18 - rockchip,px30-dsi-dphy
19 - rockchip,rk3128-dsi-dphy
20 - rockchip,rk3368-dsi-dphy
21 - rockchip,rk3568-dsi-dphy
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/linux-6.14.4/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <[email protected]>
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
23 - rockchip,rk3036-vop
24 - rockchip,rk3066-vop
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Drockchip-spdif.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Heiko Stuebner <[email protected]>
20 - const: rockchip,rk3066-spdif
21 - const: rockchip,rk3228-spdif
22 - const: rockchip,rk3328-spdif
23 - const: rockchip,rk3366-spdif
24 - const: rockchip,rk3368-spdif
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Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <[email protected]>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dspi-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: spi-controller.yaml#
17 - Heiko Stuebner <[email protected]>
23 - const: rockchip,rk3036-spi
24 - const: rockchip,rk3066-spi
25 - const: rockchip,rk3228-spi
26 - const: rockchip,rv1108-spi
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Drockchip-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
20 - Heiko Stuebner <[email protected]>
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
30 - items:
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/linux-6.14.4/Documentation/devicetree/bindings/usb/
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <[email protected]>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <[email protected]>
11 - Giuseppe Cavallaro <[email protected]>
12 - Jose Abreu <[email protected]>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/linux-6.14.4/drivers/pmdomain/rockchip/
Dpm-domains.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip Generic power domain support.
23 #include <dt-bindings/power/px30-power.h>
24 #include <dt-bindings/power/rockchip,rv1126-power.h>
25 #include <dt-bindings/power/rk3036-power.h>
26 #include <dt-bindings/power/rk3066-power.h>
27 #include <dt-bindings/power/rk3128-power.h>
28 #include <dt-bindings/power/rk3188-power.h>
29 #include <dt-bindings/power/rk3228-power.h>
30 #include <dt-bindings/power/rk3288-power.h>
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/linux-6.14.4/drivers/phy/rockchip/
Dphy-rockchip-inno-dsidphy.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Wyon Bi <bivvy.bi@rock-chips.com>
12 #include <linux/clk-provider.h>
24 #include <linux/phy/phy-mipi-dphy.h>
290 orig = readl(inno->phy_base + reg); in phy_update_bits()
293 writel(tmp, inno->phy_base + reg); in phy_update_bits()
299 unsigned long prate = clk_get_rate(inno->ref_clk); in inno_dsidphy_pll_calc_rate()
310 * PLL_Output_Frequency: it is equal to DDR-Clock-Frequency * 2 in inno_dsidphy_pll_calc_rate()
343 delta = abs(fout - tmp); in inno_dsidphy_pll_calc_rate()
358 inno->pll.prediv = best_prediv; in inno_dsidphy_pll_calc_rate()
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/linux-6.14.4/drivers/thermal/
Drockchip_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
4 * Caesar Wang <wxt@rock-chips.com>
55 * struct chip_tsadc_table - hold information about chip-specific differences
69 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
72 * @tshut_temp: the hardware-controlled shutdown temperature value
73 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
74 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
80 * @set_tshut_temp: set the hardware-controlled shutdown temperature
81 * @set_tshut_mode: set the hardware-controlled shutdown mode
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