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/linux-6.14.4/Documentation/devicetree/bindings/dvfs/
Dperformance-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic performance domains
10 - Sudeep Holla <[email protected]>
13 This binding is intended for performance management of groups of devices or
14 CPUs that run in the same performance domain. Performance domains must not
15 be confused with power domains. A performance domain is defined by a set
16 of devices that always have to run at the same performance level. For a given
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/linux-6.14.4/include/linux/
Denergy_model.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * struct em_perf_state - Performance state of a performance domain
16 * @performance: CPU performance (capacity) at a given frequency
25 unsigned long performance; member
35 * EM_PERF_STATE_INEFFICIENT: The performance state is inefficient. There is
36 * in this em_perf_domain, another performance state with a higher frequency
43 * struct em_perf_table - Performance states table
46 * @state: List of performance states, in ascending order
55 * struct em_perf_domain - Performance domain
57 * @nr_perf_states: Number of performance states
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Dscmi_protocol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2018-2021 ARM Ltd.
21 * struct scmi_revision_info - version information structure
30 * @impl_ver: A vendor-specific implementation version.
32 * @sub_vendor_id: A sub-vendor identifier(Null terminated ASCII string)
87 * struct scmi_clk_proto_ops - represents the various operations provided
133 * struct scmi_perf_proto_ops - represents the various operations provided
134 * by SCMI Performance Protocol
136 * @num_domains_get: gets the number of supported performance domains
137 * @info_get: get the information of a performance domain
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/linux-6.14.4/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek-hw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Yuan <[email protected]>
19 const: mediatek,cpufreq-hw
26 each frequency domain. Each entry corresponds to
27 a register bank for each frequency domain present.
29 "#performance-domain-cells":
31 Number of cells in a performance domain specifier.
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Dapple,cluster-cpufreq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <[email protected]>
13 Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
15 operating-points-v2 table to define the CPU performance states, with the
16 opp-level property specifying the hardware p-state index for that level.
21 - items:
22 - enum:
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Dqemu,virtual-cpufreq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/qemu,virtual-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Dai <[email protected]>
11 - Saravana Kannan <[email protected]>
14 Virtual CPUFreq is a virtualized driver in guest kernels that sends performance
16 is associated with a performance domain which can be shared with other vCPUs.
17 Each performance domain has its own set of registers for performance controls.
21 const: qemu,virtual-cpufreq
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Dairoha,en7581-cpufreq.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/airoha,en7581-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <[email protected]>
16 A virtual clock is exposed. This virtual clock is a get-only clock and
21 performance states in a power domain.
28 const: airoha,en7581-cpufreq
30 '#clock-cells':
33 '#power-domain-cells':
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/linux-6.14.4/drivers/pmdomain/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 be called qcom-cpr
21 tristate "Qualcomm RPMh Power domain driver"
24 QCOM RPMh Power domain driver to support power-domains with
25 performance states. The driver communicates a performance state
30 tristate "Qualcomm RPM Power domain driver"
36 QCOM RPM Power domain driver to support power-domains with
37 performance states. The driver communicates a performance state
/linux-6.14.4/kernel/power/
Denergy_model.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2018-2021, Arm ltd.
21 * Mutex serializing the registrations of performance domains and letting
34 return (dev->bus == &cpu_subsys); in _is_cpu_device()
48 struct em_dbg_info *em_dbg = s->private; \
53 table = em_perf_state_from_pd(em_dbg->pd); \
54 val = table[em_dbg->ps_id].name; \
65 DEFINE_EM_DBG_SHOW(performance, performance);
87 /* Create per-ps directory */ in em_debug_create_ps()
95 debugfs_create_file("performance", 0444, d, &em_dbg[i], in em_debug_create_ps()
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/linux-6.14.4/Documentation/devicetree/bindings/power/
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <[email protected]>
11 - Kevin Hilman <[email protected]>
12 - Ulf Hansson <[email protected]>
18 capable of scaling performance for a group of IP blocks.
20 This device tree binding can be used to bind PM domain consumer devices with
21 their PM domains provided by PM domain providers. A PM domain provider can be
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/linux-6.14.4/drivers/acpi/
Dprocessor_perflib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * processor_perflib.c - ACPI Processor P-States Library ($Revision: 71 $)
9 * - Added processor hotplug support
25 #define ACPI_PROCESSOR_FILE_PERFORMANCE "performance"
38 * -1 -> cpufreq low level drivers not initialized -> _PSS, etc. not called yet
40 * 0 -> cpufreq low level drivers initialized -> consider _PPC values
41 * 1 -> ignore _PPC totally -> forced by user through boot param
43 static int ignore_ppc = -1;
59 return -EINVAL; in acpi_processor_get_platform_limit()
65 status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc); in acpi_processor_get_platform_limit()
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/linux-6.14.4/Documentation/arch/powerpc/
Dassociativity.rst6 domains of substantially similar mean performance relative to resources outside
7 of that domain. Resources subsets of a given domain that exhibit better
8 performance relative to each other than relative to other resources subsets
9 are represented as being members of a sub-grouping domain. This performance
17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
23 ------
27 ------
28 With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
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/linux-6.14.4/drivers/pmdomain/mediatek/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 Say yes here to add support for the MediaTek SCPSYS power domain
18 bool "MediaTek SCPSYS generic power domain"
24 Say y here to enable power domain support.
25 In order to meet high performance and low power requirements, the System
30 tristate "Airoha CPU power domain"
36 Say y here to enable CPU power domain support for Airoha SoC.
39 set performance states.
/linux-6.14.4/Documentation/scheduler/
Dsched-energy.rst6 ---------------
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
38 performance [inst/s]
39 --------------------
45 -----------
48 while still getting 'good' performance. It is essentially an alternative
49 optimization objective to the current performance-only objective for the
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/linux-6.14.4/Documentation/power/
Denergy-model.rst1 .. SPDX-License-Identifier: GPL-2.0
8 -----------
11 the power consumed by devices at various performance levels, and the kernel
12 subsystems willing to use that information to make energy-aware decisions.
18 each and every client subsystem to re-implement support for each and every
23 The power values might be expressed in micro-Watts or in an 'abstract scale'.
26 can be found in the Energy-Aware Scheduler documentation
27 Documentation/scheduler/sched-energy.rst. For some subsystems like thermal or
30 thus the real micro-Watts might be needed. An example of these requirements can
32 Documentation/driver-api/thermal/power_allocator.rst.
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/linux-6.14.4/drivers/base/power/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/common.c - Common device power management code.
19 * dev_pm_get_subsys_data - Create or refcount power.subsys_data for device.
32 return -ENOMEM; in dev_pm_get_subsys_data()
34 spin_lock_irq(&dev->power.lock); in dev_pm_get_subsys_data()
36 if (dev->power.subsys_data) { in dev_pm_get_subsys_data()
37 dev->power.subsys_data->refcount++; in dev_pm_get_subsys_data()
39 spin_lock_init(&psd->lock); in dev_pm_get_subsys_data()
40 psd->refcount = 1; in dev_pm_get_subsys_data()
41 dev->power.subsys_data = psd; in dev_pm_get_subsys_data()
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/linux-6.14.4/Documentation/admin-guide/pm/
Dintel_uncore_frequency_scaling.rst1 .. SPDX-License-Identifier: GPL-2.0
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
17 performance, SoCs have internal algorithms for scaling uncore frequency. These
20 It is possible that users have different expectations of uncore performance and
22 the scaling min/max frequencies via cpufreq sysfs to improve CPU performance.
25 different core and uncore performance at distinct phases and they may want to
27 improve overall performance.
30 ---------------
45 This is a read-only attribute. If users adjust max_freq_khz,
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/linux-6.14.4/drivers/pmdomain/arm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SCMI performance domain driver"
8 This enables support for the SCMI performance domains which can be
15 tristate "SCMI power domain driver"
28 tristate "SCPI power domain driver"
Dscmi_perf_domain.c1 // SPDX-License-Identifier: GPL-2.0
3 * SCMI performance domain support.
32 if (!pd->info->set_perf) in scmi_pd_set_perf_state()
36 return -EINVAL; in scmi_pd_set_perf_state()
38 ret = pd->perf_ops->level_set(pd->ph, pd->domain_id, state, false); in scmi_pd_set_perf_state()
40 dev_warn(&genpd->dev, "Failed with %d when trying to set %d perf level", in scmi_pd_set_perf_state()
54 * the performance level can be changed. in scmi_pd_attach_dev()
56 if (!pd->info->set_perf) in scmi_pd_attach_dev()
59 ret = pd->perf_ops->device_opps_add(pd->ph, dev, pd->domain_id); in scmi_pd_attach_dev()
71 if (!pd->info->set_perf) in scmi_pd_detach_dev()
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/linux-6.14.4/drivers/cpufreq/
Dscmi-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
11 #include <linux/clk-provider.h>
41 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_get_rate()
45 ret = perf_ops->freq_get(ph, priv->domain_id, &rate, false); in scmi_cpufreq_get_rate()
52 * perf_ops->freq_set is not a synchronous, the actual OPP change will
59 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_set_target()
60 u64 freq = policy->freq_table[index].frequency; in scmi_cpufreq_set_target()
62 return perf_ops->freq_set(ph, priv->domain_id, freq * 1000, false); in scmi_cpufreq_set_target()
68 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_fast_switch()
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/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
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/linux-6.14.4/drivers/clk/tegra/
Dclk-device.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/clk-provider.h>
18 * This driver manages performance state of the core power domain for the
33 struct device *dev = clk_dev->dev; in tegra_clock_set_pd_state()
38 if (opp == ERR_PTR(-ERANGE)) { in tegra_clock_set_pd_state()
43 * need to set up performance state of the power domain and in tegra_clock_set_pd_state()
71 mutex_lock(&clk_dev->lock); in tegra_clock_change_notify()
74 if (cnd->new_rate > cnd->old_rate) in tegra_clock_change_notify()
75 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
79 err = tegra_clock_set_pd_state(clk_dev, cnd->old_rate); in tegra_clock_change_notify()
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/linux-6.14.4/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-events2 /sys/devices/cpu/events/branch-misses
3 /sys/devices/cpu/events/cache-references
4 /sys/devices/cpu/events/cache-misses
5 /sys/devices/cpu/events/stalled-cycles-frontend
6 /sys/devices/cpu/events/branch-instructions
7 /sys/devices/cpu/events/stalled-cycles-backend
9 /sys/devices/cpu/events/cpu-cycles
13 Contact: Linux kernel mailing list <linux-[email protected]>
15 Description: Generic performance monitoring events
17 A collection of performance monitoring events that may be
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/linux-6.14.4/include/dt-bindings/power/
Dqcom-rpmpd.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* SA8775P Power Domain Indexes */
26 /* SDM670 Power Domain Indexes */
36 /* SDM845 Power Domain Indexes */
47 /* SDX55 Power Domain Indexes */
52 /* SDX65 Power Domain Indexes */
60 /* SM6350 Power Domain Indexes */
68 /* SM6350 Power Domain Indexes */
80 /* SM8150 Power Domain Indexes */
102 /* SM8250 Power Domain Indexes */
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/linux-6.14.4/drivers/firmware/arm_scmi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 set of operating system-independent software interfaces that are
11 interfaces for: Discovery and self-description of the interfaces
12 it supports, Power domain management which is the ability to place
13 a given device or domain into the various power-saving states that
14 it supports, Performance management which is the ability to control
15 the performance of a domain that is composed of compute engines

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