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/linux-6.14.4/Documentation/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Currently, LoongArch based processors (e.g. Loongson-3A5000) can only work together
10 I/O Interrupt Controller), HTVECINTC (Hyper-Transport Vector Interrupt Controller),
11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,
22 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
27 +-----+ +---------+ +-------+
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,pch-pic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCH PIC Controller
10 - Jiaxun Yang <[email protected]>
13 This interrupt controller is found in the Loongson LS7A family of PCH for
14 transforming interrupts from on-chip devices into HyperTransport vectorized
19 const: loongson,pch-pic-1.0
22 maxItems: 1
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Dloongson,htpic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <[email protected]>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
17 interrupts from PCH PIC connected on HyperTransport bus.
21 const: loongson,htpic-1.0
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/linux-6.14.4/Documentation/translations/zh_TW/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片組的主中
16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在這種模型裏面，IPI（Inter-Processor Interrupt）和CPU本地時鐘中斷直接發送到CPUINTC，
27 CPU串口（UARTs）中斷髮送到LIOINTC，而其他所有設備的中斷則分別發送到所連接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
30 +-----+ +---------+ +-------+
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/linux-6.14.4/Documentation/translations/zh_CN/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片组的主中
16 断控制器）、PCH-LPC（LS7A芯片组的LPC中断控制器）和PCH-MSI（MSI中断控制器）。
19 全局中断控制器（每个芯片一个，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
27 CPU串口（UARTs）中断发送到LIOINTC，而其他所有设备的中断则分别发送到所连接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然后被HTVECINTC统一收集，再发送到LIOINTC，最后到达CPUINTC::
30 +-----+ +---------+ +-------+
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/linux-6.14.4/arch/loongarch/kvm/intc/
Dpch_pic.c1 // SPDX-License-Identifier: GPL-2.0
21 if (mask & s->irr & ~s->mask) { in pch_pic_update_irq()
22 s->isr |= mask; in pch_pic_update_irq()
23 irq = s->htmsi_vector[irq]; in pch_pic_update_irq()
24 eiointc_set_irq(s->kvm->arch.eiointc, irq, level); in pch_pic_update_irq()
27 if (mask & s->isr & ~s->irr) { in pch_pic_update_irq()
28 s->isr &= ~mask; in pch_pic_update_irq()
29 irq = s->htmsi_vector[irq]; in pch_pic_update_irq()
30 eiointc_set_irq(s->kvm->arch.eiointc, irq, level); in pch_pic_update_irq()
45 bitmap_clear((void *)&irq_mask, irq, 1); in pch_pic_update_batch_irqs()
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/linux-6.14.4/drivers/irqchip/
Dirq-loongson-pch-pic.c1 // SPDX-License-Identifier: GPL-2.0
4 * Loongson PCH PIC support
7 #define pr_fmt(fmt) "pch-pic: " fmt
20 #include "irq-loongson.h"
62 return priv->table[hirq]; in hwirq_to_bit()
68 void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4; in pch_pic_bitset()
70 raw_spin_lock(&priv->pic_lock); in pch_pic_bitset()
74 raw_spin_unlock(&priv->pic_lock); in pch_pic_bitset()
80 void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4; in pch_pic_bitclr()
82 raw_spin_lock(&priv->pic_lock); in pch_pic_bitclr()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
23 default 1
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
181 will be called irq-lan966x-oic.
222 bool "J-Core integrated AIC" if COMPILE_TEST
226 Support for the J-Core integrated AIC.
237 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
240 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
245 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
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/linux-6.14.4/arch/mips/boot/dts/loongson/
Dls7a-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 pch: bus@10000000 { label
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 pic: interrupt-controller@10000000 { label
14 compatible = "loongson,pch-pic-1.0";
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
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/linux-6.14.4/arch/loongarch/boot/dts/
Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu0: cpu@1 {
34 ref_100m: clock-ref-100m {
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/linux-6.14.4/arch/loongarch/kvm/
Dirqfd.c1 // SPDX-License-Identifier: GPL-2.0
13 /* PCH-PIC pin (0 ~ 64) <---> GSI (0 ~ 64) */ in kvm_set_pic_irq()
14 pch_pic_set_irq(kvm->arch.pch_pic, e->irqchip.pin, level); in kvm_set_pic_irq()
30 return -1; in kvm_set_msi()
32 pch_msi_set_irq(kvm, e->msi.data, level); in kvm_set_msi()
44 * return 0 on success, -EINVAL on errors.
50 switch (ue->type) { in kvm_set_routing_entry()
52 e->set = kvm_set_pic_irq; in kvm_set_routing_entry()
53 e->irqchip.irqchip = ue->u.irqchip.irqchip; in kvm_set_routing_entry()
54 e->irqchip.pin = ue->u.irqchip.pin; in kvm_set_routing_entry()
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Dexit.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
34 ++vcpu->stat.cpucfg_exits; in kvm_emu_cpucfg()
35 index = vcpu->arch.gprs[rj]; in kvm_emu_cpucfg()
45 case 0 ... (KVM_MAX_CPUCFG_REGS - 1): in kvm_emu_cpucfg()
46 vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index]; in kvm_emu_cpucfg()
49 /* CPUCFG emulation between 0x40000000 -- 0x400000ff */ in kvm_emu_cpucfg()
50 vcpu->arch.gprs[rd] = *(unsigned int *)KVM_SIGNATURE; in kvm_emu_cpucfg()
53 ret = vcpu->kvm->arch.pv_features & LOONGARCH_PV_FEAT_MASK; in kvm_emu_cpucfg()
54 vcpu->arch.gprs[rd] = ret; in kvm_emu_cpucfg()
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Dmain.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
43 * function to set the flag to 1 (SW_GCSR) or 2 (HW_GCSR) if the
202 context = per_cpu_ptr(vcpu->kvm->arch.vmcs, cpu); in kvm_update_vpid()
203 vpid = context->vpid_cache + 1; in kvm_update_vpid()
207 vpid = vpid_mask + 1; in kvm_update_vpid()
215 context->vpid_cache = vpid; in kvm_update_vpid()
216 vcpu->arch.vpid = vpid; in kvm_update_vpid()
231 context = per_cpu_ptr(vcpu->kvm->arch.vmcs, cpu); in kvm_check_vpid()
232 migrated = (vcpu->cpu != cpu); in kvm_check_vpid()
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/linux-6.14.4/drivers/pci/
Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
22 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
106 int ret = -ENOTTY; in pcie_failed_link_retrain()
109 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
117 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
175 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
176 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
177 (f->vendor == dev->vendor || in pci_do_fixups()
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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