Home
last modified time | relevance | path

Searched +full:omap2 +full:- +full:nand (Results 1 – 25 of 43) sorted by relevance

12

/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <[email protected]>
11 - Roger Quadros <[email protected]>
16 - Asynchronous SRAM-like memories and ASICs
17 - Asynchronous, synchronous, and page mode burst NOR flash
18 - NAND flash
19 - Pseudo-SRAM devices
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/mtd/
Dti,gpmc-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments GPMC NAND Flash controller.
10 - Tony Lindgren <[email protected]>
11 - Roger Quadros <[email protected]>
14 GPMC NAND controller/Flash is represented as a child of the
20 - enum:
21 - ti,am64-nand
[all …]
/linux-6.14.4/drivers/mtd/nand/onenand/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 tristate "OneNAND on OMAP2/OMAP3 support"
31 Support for a OneNAND flash device connected to an OMAP2/OMAP3 SoC
47 One Block of the NAND Flash Array memory is reserved as
48 a One-Time Programmable Block memory area.
49 Also, 1st Block of NAND Flash Array can be used as OTP.
52 operations as any other NAND Flash Array memory block.
55 OTP block is fully-guaranteed to be a valid block.
61 Since the device is equipped with two DataRAMs, and two-plane NAND
/linux-6.14.4/arch/arm/boot/dts/ti/omap/
Domap3430-sdp.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3";
20 clock-frequency = <2600000>;
32 vmmc-supply = <&vmmc1>;
33 vqmmc-supply = <&vsim>;
35 * S6-3 must be in ON position for 8 bit mode to function
38 bus-width = <8>;
51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */
[all …]
Domap3-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "omap3-evm-common.dtsi"
9 #include "omap3-evm-processor-common.dtsi"
13 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
17 pinctrl-names = "default";
18 pinctrl-0 = <&hsusb2_2_pins>;
20 ehci_phy_pins: ehci-phy-pins {
21 pinctrl-single,pins = <
[all …]
Domap3-evm-37xx.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "omap3-evm-common.dtsi"
9 #include "omap3-evm-processor-common.dtsi"
13 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
17 pinctrl-names = "default";
18 pinctrl-0 = <&hsusb2_2_pins>;
20 ehci_phy_pins: ehci-phy-pins {
21 pinctrl-single,pins = <
[all …]
Domap3-igep.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
19 stdout-path = &uart3;
23 compatible = "ti,omap-twl4030";
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
37 gpmc_pins: gpmc-pins {
38 pinctrl-single,pins = <
[all …]
Ddm8148-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814";
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
27 phy-mode = "rgmii-id";
[all …]
Ddra62x-j5eco-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814";
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
27 phy-mode = "rgmii-id";
[all …]
Dam335x-chilisom.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "grinn,am335x-chilisom", "ti,am33xx";
15 cpu0-supply = <&dcdc2_reg>;
26 pinctrl-names = "default";
28 i2c0_pins: i2c0-pins {
29 pinctrl-single,pins = <
35 nandflash_pins: nandflash-pins {
36 pinctrl-single,pins = <
[all …]
Dlogicpd-torpedo-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/input/input.h>
7 stdout-path = &uart1;
12 cpu0-supply = <&vcc>;
22 compatible = "gpio-leds";
23 led-user0 {
26 linux,default-trigger = "none";
32 #clock-cells = <0>;
33 compatible = "fixed-clock";
34 clock-frequency = <26000000>;
[all …]
Dam3517-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on am3517-evm.dts
11 cpu0-supply = <&vdd_core_reg>;
16 compatible = "regulator-fixed";
17 regulator-name = "wl1271_buf";
18 regulator-min-microvolt = <1800000>;
19 regulator-max-microvolt = <1800000>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&wl12xx_buffer_pins>;
23 regulator-always-on;
[all …]
Dam335x-igep0033.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
5 * Copyright (C) 2013 ISEE 2007 SL - https://www.isee.biz
8 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
16 cpu0-supply = <&vdd1_reg>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&leds_pins>;
29 compatible = "gpio-leds";
34 default-state = "on";
[all …]
Ddm8168-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816";
19 compatible = "regulator-fixed";
20 regulator-name = "vmmcsd_fixed";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
[all …]
Dam335x-myirtech-myc.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* SPDX-FileCopyrightText: Alexander Shiyan, <[email protected]> */
5 /* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */
7 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
15 model = "MYIR MYC-AM335X";
16 compatible = "myir,myc-am335x", "ti,am33xx";
20 cpu0-supply = <&vdd_core>;
21 voltage-tolerance = <2>;
[all …]
Dam335x-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "phytec,am335x-phycore-som", "ti,am33xx";
22 cpu0-supply = <&vdd1_reg>;
32 compatible = "regulator-fixed";
33 regulator-name = "vcc5v";
34 regulator-min-microvolt = <5000000>;
35 regulator-max-microvolt = <5000000>;
36 regulator-boot-on;
37 regulator-always-on;
[all …]
Domap3-overo-base.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
17 led-controller {
18 compatible = "pwm-leds";
20 led-1 {
23 max-brightness = <127>;
24 linux,default-trigger = "mmc0";
29 compatible = "ti,omap-twl4030";
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
39 regulator-min-microvolt = <5000000>;
[all …]
Dlogicpd-som-lv.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/input/input.h>
8 cpu0-supply = <&vcc>;
18 compatible = "regulator-fixed";
19 regulator-name = "vwl1271";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
23 startup-delay-us = <70000>;
24 enable-active-high;
25 vin-supply = <&vaux3>;
[all …]
Domap3-cm-t3x.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Common support for CompuLab CM-T3x CoMs
14 compatible = "gpio-leds";
15 pinctrl-names = "default";
16 pinctrl-0 = <&green_led_pins>;
18 label = "cm-t3x:green";
20 linux,default-trigger = "heartbeat";
26 compatible = "regulator-fixed";
27 regulator-name = "hsusb1_vbus";
28 regulator-min-microvolt = <3300000>;
[all …]
Domap3-tao3530.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
26 cpu0-supply = <&vcc>;
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
42 startup-delay-us = <70000>;
46 hsusb2_phy: hsusb2-phy-pins {
[all …]
/linux-6.14.4/drivers/mtd/nand/raw/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
4 obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
6 obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
7 obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
8 obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
9 obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o
10 obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o
11 obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
12 obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Raw/Parallel NAND Device Support"
8 NAND flash devices. For further information see
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
13 comment "Raw/parallel NAND flash controllers"
19 tristate "Denali NAND controller on Intel Moorestown"
23 Enable the driver for NAND flash on Intel Moorestown, using the
24 Denali NAND controller core.
27 tristate "Denali NAND controller as a DT device"
31 Enable the driver for NAND flash on platforms using a Denali NAND
[all …]
Domap2.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-ecc-sw-bch.h>
21 #include <linux/omap-dma.h>
29 #include <linux/omap-gpmc.h>
30 #include <linux/platform_data/mtd-nand-omap2.h>
32 #define DRIVER_NAME "omap2-nand"
145 struct nand_chip nand; member
172 /* NAND ready gpio */
187 return container_of(mtd_to_nand(mtd), struct omap_nand_info, nand); in mtd_to_omap()
[all …]
/linux-6.14.4/include/linux/platform_data/
Dmtd-nand-omap2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
23 * 1-bit ECC: calculation and correction by SW
29 * 1-bit ECC: calculation by GPMC, Error detection by Software
33 /* 4-bit ECC calculation by GPMC, Error detection by Software */
35 /* 4-bit ECC calculation by GPMC, Error detection by ELM */
37 /* 8-bit ECC calculation by GPMC, Error detection by Software */
39 /* 8-bit ECC calculation by GPMC, Error detection by ELM */
41 /* 16-bit ECC calculation by GPMC, Error detection by ELM */
67 { .compatible = "ti,omap2-nand", },
68 { .compatible = "ti,am64-nand", },
/linux-6.14.4/drivers/memory/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
42 Used to configure the EBI (external bus interface) when the device-
68 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
72 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
73 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
75 tags and way-select latencies of RAM access. This driver provides a
76 dt properties-based and sysfs interface for it.
85 is intended to provide a glue-less interface to a variety of
86 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
99 functions of the driver includes re-configuring AC timing
[all …]

12