Searched +full:num +full:- +full:domains (Results 1 – 25 of 251) sorted by relevance
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/linux-6.14.4/arch/arm64/boot/dts/ti/ |
D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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D | k3-j784s4-j742s2-main-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 29 compatible = "mmio-sram"; [all …]
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D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 24 #address-cells = <2>; 25 #size-cells = <2>; 27 #interrupt-cells = <3>; [all …]
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D | k3-am62p-j722s-common-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 gic500: interrupt-controller@1800000 { 16 compatible = "arm,gic-v3"; 17 #address-cells = <2>; 18 #size-cells = <2>; 20 #interrupt-cells = <3>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/ |
D | riscv,aplic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V Advanced Platform Level Interrupt Controller (APLIC) 10 - Anup Patel <[email protected]> 13 The RISC-V advanced interrupt architecture (AIA) defines an advanced 15 in a RISC-V platform. The RISC-V AIA specification can be found at 16 https://github.com/riscv/riscv-aia. 18 The RISC-V APLIC is implemented as hierarchical APLIC domains where all [all …]
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D | fsl,irqsteer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <[email protected]> 15 - const: fsl,imx-irqsteer 16 - items: 17 - enum: 18 - fsl,imx8m-irqsteer 19 - fsl,imx8mp-irqsteer [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | imx8qm-ss-hsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 compatible = "simple-bus"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 compatible = "fsl,imx8q-pcie"; 19 reg-names = "dbi", "config"; 22 #interrupt-cells = <1>; 24 interrupt-names = "msi"; 25 #address-cells = <3>; 26 #size-cells = <2>; [all …]
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D | imx8-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 conn_axi_clk: clock-conn-axi { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <333333333>; 14 clock-output-names = "conn_axi_clk"; 17 conn_ahb_clk: clock-conn-ahb { [all …]
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D | imx8-ss-hsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include <dt-bindings/phy/phy.h> 9 hsio_axi_clk: clock-hsio-axi { 10 compatible = "fixed-clock"; 11 #clock-cells = <0>; 12 clock-frequency = <400000000>; 13 clock-output-names = "hsio_axi_clk"; 16 hsio_per_clk: clock-hsio-per { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pci/ |
D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <[email protected]> 16 - const: ti,j721e-pcie-ep 17 - const: ti,j784s4-pcie-ep 18 - description: PCIe EP controller in AM64 20 - const: ti,am64-pcie-ep [all …]
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D | ti,am65-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <[email protected]> 14 - $ref: /schemas/pci/pci-host-bridge.yaml# 19 - ti,am654-pcie-rc 20 - ti,keystone-pcie 25 reg-names: [all …]
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D | ti,j721e-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <[email protected]> 16 - const: ti,j721e-pcie-host 17 - const: ti,j784s4-pcie-host 18 - description: PCIe controller in AM64 20 - const: ti,am64-pcie-host [all …]
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D | rcar-gen4-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2022-2023 Renesas Electronics Corp. 4 --- 5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-ep.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Gen4 PCIe Endpoint 11 - Yoshihiro Shimoda <[email protected]> 14 - $ref: snps,dw-pcie-ep.yaml# 19 - enum: 20 - renesas,r8a779f0-pcie-ep # R-Car S4-8 [all …]
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/linux-6.14.4/drivers/pmdomain/mediatek/ |
D | mtk-scpsys.c | 1 // SPDX-License-Identifier: GPL-2.0-only 16 #include <dt-bindings/power/mt2701-power.h> 17 #include <dt-bindings/power/mt2712-power.h> 18 #include <dt-bindings/power/mt6797-power.h> 19 #include <dt-bindings/power/mt7622-power.h> 20 #include <dt-bindings/power/mt7623a-power.h> 21 #include <dt-bindings/power/mt8173-power.h> 28 #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x)) 112 * struct scp_domain_data - scp domain data for power on/off flow 120 * @caps: The flag for active wake-up action. [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/firmware/ |
D | arm,scpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Sudeep Holla <[email protected]> 33 - const: arm,scpi # SCPI v1.0 and above 34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0 35 - items: 36 - enum: 37 - amlogic,meson-gxbb-scpi 38 - const: arm,scpi-pre-1.0 [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/media/ |
D | brcm,bcm2835-unicam.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/brcm,bcm2835-unicam.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Raspberry Pi Kernel Maintenance <kernel-[email protected]> 12 description: |- 14 CSI-2 or CCP2 data from image sensors or similar devices. 26 const: brcm,bcm2835-unicam 30 - description: Unicam block. 31 - description: Clock Manager Image (CMI) block. [all …]
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/linux-6.14.4/arch/arm/boot/dts/ti/keystone/ |
D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; 33 #size-cells = <0>; [all …]
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/linux-6.14.4/arch/arm/boot/dts/renesas/ |
D | r7s72100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-14 Renesas Solutions Corp. 6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> 9 #include <dt-bindings/clock/r7s72100-clock.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 32 #clock-cells = <0>; 33 compatible = "fixed-factor-clock"; [all …]
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D | r7s9210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 20 #clock-cells = <0>; 21 compatible = "fixed-clock"; 23 clock-frequency = <0>; 27 #clock-cells = <0>; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | qcs8300.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qcs8300-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/clock/qcom,sa8775p-camcc.h> 9 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> 10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 11 #include <dt-bindings/clock/qcom,sa8775p-videocc.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/interconnect/qcom,icc.h> 14 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h> [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/ |
D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <[email protected]> 11 - Roger Quadros <[email protected]> 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash 18 - NAND flash 19 - Pseudo-SRAM devices [all …]
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