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/linux-6.14.4/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
Dsve.json4 …ding the Advanced SIMD scalar instructions and the instructions listed in Non-SIMD SVE instruction…
8 …ecturally executed SVE instructions, including the instructions listed in Non-SIMD SVE instruction…
12 …ecturally executed SVE instructions, including the instructions listed in Non-SIMD SVE instruction…
20 "BriefDescription": "This event counts all architecturally executed micro-operations."
28 …ations due to scalar, Advanced SIMD, and SVE instructions listed in Floating-point instructions se…
32 …on": "This event counts architecturally executed floating-point fused multiply-add and multiply-su…
36 …"BriefDescription": "This event counts architecturally executed floating-point reciprocal estimate…
40 …uted floating-point convert operations due to the scalar, Advanced SIMD, and SVE floating-point co…
60 …"BriefDescription": "This event counts architecturally executed SVE 64-bit integer divide operatio…
76 …"BriefDescription": "This event counts architecturally executed SVE integer 64-bit x 64-bit multip…
[all …]
Dl2_cache.json12 …escription": "This event counts every write-back of data from the L2 cache caused by L2 replace, n…
40 …"BriefDescription": "This event counts every write-back of data from the L2 cache caused by L2 rep…
95 …"BriefDescription": "This event counts every write-back of data from the L2 cache caused by L2 rep…
100 …BriefDescription": "This event counts every write-back of data from the L2 cache caused by non-tem…
105 …"BriefDescription": "This event counts every write-back of data from the L2 cache caused by DC ZVA…
110 "BriefDescription": "This event counts every flush-back (drop) of data from the L2 cache."
/linux-6.14.4/drivers/gpu/drm/i915/
Di915_memcpy.c58 len -= 4; in __memcpy_ntdqa()
60 while (len--) { in __memcpy_ntdqa()
87 len -= 4; in __memcpy_ntdqu()
89 while (len--) { in __memcpy_ntdqu()
107 * non-temporal instructions where available. Note that all arguments
138 * @src to @dst using * non-temporal instructions where available, but
140 * potential 16-byte read past the end.
150 unsigned long x = min(ALIGN(addr, 16) - addr, len); in i915_unaligned_memcpy_from_wc()
154 len -= x; in i915_unaligned_memcpy_from_wc()
166 * Some hypervisors (e.g. KVM) don't support VEX-prefix instructions in i915_memcpy_init_early()
/linux-6.14.4/tools/perf/pmu-events/arch/x86/goldmontplus/
Dcache.json20 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.",
33 …from the intra-die interconnect (IDI) fabric. The XQ may reject transactions from the L2Q (non-cac…
176 "BriefDescription": "Memory uops retired that split a cache-line (Precise event capable)",
187 "BriefDescription": "Load uops retired that split a cache-line (Precise event capable)",
198 "BriefDescription": "Stores uops retired that split a cache-line (Precise event capable)",
602 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th…
608 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t…
613 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th…
619 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t…
624 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th…
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/goldmont/
Dcache.json20 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.",
33 …from the intra-die interconnect (IDI) fabric. The XQ may reject transactions from the L2Q (non-cac…
176 "BriefDescription": "Memory uops retired that split a cache-line (Precise event capable)",
187 "BriefDescription": "Load uops retired that split a cache-line (Precise event capable)",
198 "BriefDescription": "Stores uops retired that split a cache-line (Precise event capable)",
558 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th…
564 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t…
569 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th…
575 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t…
580 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th…
[all …]
/linux-6.14.4/Documentation/accel/amdxdna/
Damdnpu.rst1 .. SPDX-License-Identifier: GPL-2.0-only
15 AMD NPU (Neural Processing Unit) is a multi-user AI inference accelerator
27 --------------
44 ----------------
52 ---------------
58 NPU Firmware uses a dedicated instance of an isolated non-privileged context
66 ---------
79 -------
82 MSI-X interrupt vectors. NPU uses a dedicated high bandwidth SoC level fabric
84 dedicated MSI-X interrupt. MERT gets a single instance of MSI-X interrupt.
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/linux-6.14.4/include/uapi/linux/media/raspberrypi/
Dpisp_be_config.h1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
5 * Copyright (C) 2021 - Raspberry Pi Ltd
97 * struct pisp_be_global_config - PiSP global enable bitmaps
111 * struct pisp_be_input_buffer_config - PiSP Back End input buffer
120 * struct pisp_be_dpc_config - PiSP Back End DPC config
138 * struct pisp_be_geq_config - PiSP Back End GEQ config
150 #define PISP_BE_GEQ_SLOPE ((1 << 10) - 1)
158 * struct pisp_be_tdn_input_buffer_config - PiSP Back End TDN input buffer
167 * struct pisp_be_tdn_config - PiSP Back End TDN config
169 * Temporal Denoise configuration
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/linux-6.14.4/arch/x86/lib/
Dusercopy_64.c1 // SPDX-License-Identifier: GPL-2.0-only
20 * clean_cache_range - write back a cache range with CLWB
31 unsigned long clflush_mask = x86_clflush_size - 1; in clean_cache_range()
56 * __copy_user_nocache() uses non-temporal stores for the bulk in __copy_user_flushcache()
60 * - Require 8-byte alignment when size is 8 bytes or larger. in __copy_user_flushcache()
61 * - Require 4-byte alignment when size is 4 bytes. in __copy_user_flushcache()
72 flushed = dest - (unsigned long) dst; in __copy_user_flushcache()
73 if (size > flushed && !IS_ALIGNED(size - flushed, 8)) in __copy_user_flushcache()
74 clean_cache_range(dst + size - 1, 1); in __copy_user_flushcache()
87 size_t len = min_t(size_t, size, ALIGN(dest, 8) - dest); in __memcpy_flushcache()
[all …]
Dcopy_user_uncached_64.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2023 Linus Torvalds <torvalds@linux-foundation.org>
11 * copy_user_nocache - Uncached memory copy with exception handling
17 * Note: only 32-bit and 64-bit stores have non-temporal versions,
30 /* If destination is not 7-byte aligned, we'll have to align it */
66 * just try the non-unrolled loop.
111 * not try to do any byte-wise cached accesses.
112 * We will try to do one more 4-byte uncached
161 * the destination isn't 8-byte aligned. The
162 * 4-byte case can be done uncached, but any
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/linux-6.14.4/Documentation/RCU/
DwhatisRCU.rst3 What is RCU? -- "Read, Copy, Update"
21 …ries: Fundamentals https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries
22 …Cases https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries-additional-use-cases
28 during the 2.5 development effort that is optimized for read-mostly
47 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>`
67 everything, feel free to read the whole thing -- but if you are really
69 never need this document anyway. ;-)
74 ----------------
103 b. Wait for all previous readers to complete their RCU read-side
112 use much lighter-weight synchronization, in some cases, absolutely no
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/linux-6.14.4/drivers/media/pci/cx18/
Dcx23418.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <media/drv-intf/cx2341x.h>
19 IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
21 OUT[0] - Task handle. This handle is passed along with commands to
23 ReturnCode - One of the ERR_SYS_... */
27 IN[0] - Task handle. Hanlde of the task to destroy
28 ReturnCode - One of the ERR_SYS_... */
49 IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
50 IN[1] - caller buffer address, or 0
51 ReturnCode - ??? */
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/linux-6.14.4/drivers/gpu/drm/nouveau/
Dnouveau_connector.h79 NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL),
147 * even on pre-nv50 where we do not support atomic. This embedded
148 * version gets used in the non atomic modeset case.
165 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in nouveau_connector_is_mst()
172 encoder = &nv_encoder->base.base; in nouveau_connector_is_mst()
173 return encoder->encoder_type == DRM_MODE_ENCODER_DPMST; in nouveau_connector_is_mst()
183 struct drm_device *dev = nv_crtc->base.dev; in nouveau_crtc_connector_get()
191 if (connector->encoder && connector->encoder->crtc == crtc) { in nouveau_crtc_connector_get()
/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dext-ctrls-codec.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-controls:
24 .. _mpeg-control-id:
27 -----------------
35 .. _v4l2-mpeg-stream-type:
40 enum v4l2_mpeg_stream_type -
41 The MPEG-1, -2 or -4 output stream type. One cannot assume anything
48 .. flat-table::
49 :header-rows: 0
50 :stub-columns: 0
[all …]
Ddev-raw-vbi.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _raw-vbi:
106 .. flat-table:: struct v4l2_vbi_format
107 :header-rows: 0
108 :stub-columns: 0
111 * - __u32
112 - ``sampling_rate``
113 - Samples per second, i. e. unit 1 Hz.
114 * - __u32
115 - ``offset``
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/linux-6.14.4/drivers/media/platform/chips-media/wave5/
Dwave5-vpuapi.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * Wave5 series multi-standard codec IP - helper definitions
5 * Copyright (C) 2021-2023 CHIPS&MEDIA INC
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-mem2mem.h>
15 #include <media/v4l2-ctrls.h>
16 #include "wave5-vpuerror.h"
17 #include "wave5-vpuconfig.h"
18 #include "wave5-vdi.h"
193 #define DISPLAY_IDX_FLAG_SEQ_END -1
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/linux-6.14.4/arch/x86/kernel/cpu/resctrl/
Dinternal.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE)
41 /* Non-Temporal Writes to Local Memory */
44 /* Non-Temporal Writes to Remote Memory */
60 * cpumask_any_housekeeping() - Choose any CPU in @mask, preferring those that
110 struct kernfs_fs_context *kfc = fc->fs_private; in rdt_fc2context()
116 * struct mon_evt - Entry in the event list of a resource
120 * @list: entry in &rdt_resource->evt_list
130 * union mon_data_bits - Monitoring details for each event file.
154 * struct rmid_read - Data passed across smp_call*() to read event count.
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/linux-6.14.4/drivers/staging/media/atomisp/pci/
Datomisp_cmd.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 #include <media/v4l2-subdev.h>
85 /* Function to configure temporal noise reduction (TNR) */
228 /* Get sensor padding values for the non padded width x height resolution */
232 /* Set sensor power (no-op if already on/off) */
238 /* Setup media-controller links to reflect input_curr setting */
/linux-6.14.4/drivers/gpu/drm/
Ddrm_cache.c3 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
28 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
34 #include <linux/iosys-map.h>
79 * drm_clflush_pages - Flush dcache lines of a set of pages.
121 * drm_clflush_sg - Flush dcache lines pointing to a scather-gather.
151 * drm_clflush_virt_range - Flush dcache lines of a region
166 addr = (void *)(((unsigned long)addr) & -size); in drm_clflush_virt_range()
170 clflushopt(end - 1); /* force serialisation */ in drm_clflush_virt_range()
207 for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling) in drm_need_swiotlb()
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/linux-6.14.4/tools/perf/pmu-events/arch/x86/amdzen5/
Dload-store.json5 …"BriefDescription": "Store-to-load conflicts (load unable to complete due to a non-forwardable con…
27 "BriefDescription": "Number of memory load operations dispatched to the load-store unit.",
33 "BriefDescription": "Number of memory store operations dispatched to the load-store unit.",
39 "BriefDescription": "Number of memory load-store operations dispatched to the load-store unit.",
45 "BriefDescription": "Number of memory operations dispatched to the load-store unit.",
61 "BriefDescription": "Store-to-load-forward (STLF) hits."
66 …"BriefDescription": "Non-cacheable store commits cancelled due to the non-cacheable commit buffer …
72 …iption": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for load-store all…
78 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for har…
84 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for all…
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/linux-6.14.4/tools/memory-model/
Dlinux-kernel.cat1 // SPDX-License-Identifier: GPL-2.0+
9 * "Frightening small children and disconcerting grown-ups: Concurrency
14 "Linux-kernel memory consistency model"
28 let acq-po = [Acquire] ; po ; [M]
29 let po-rel = [M] ; po ; [Release]
30 let po-unlock-lock-po = po ; [UL] ; (po|rf) ; [LKR] ; po
37 ([M] ; fencerel(Before-atomic) ; [RMW] ; po? ; [M]) |
38 ([M] ; po? ; [RMW] ; fencerel(After-atomic) ; [M]) |
39 ([M] ; po? ; [LKW] ; fencerel(After-spinlock) ; [M]) |
41 * Note: The po-unlock-lock-po relation only passes the lock to the direct
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/arm64/
Dcommon-and-microarch.json129 "PublicDescription": "Attributable Level 1 data cache write-back",
132 "BriefDescription": "Attributable Level 1 data cache write-back"
147 "PublicDescription": "Attributable Level 2 data cache write-back",
150 "BriefDescription": "Attributable Level 2 data cache write-back"
273 "PublicDescription": "Access to another socket in a multi-socket system",
276 "BriefDescription": "Access to another socket in a multi-socket system"
303 … "PublicDescription": "Attributable memory read access to another socket in a multi-socket system",
306 … "BriefDescription": "Attributable memory read access to another socket in a multi-socket system"
309 …"PublicDescription": "Level 1 data cache long-latency read miss. The counter counts each memory r…
312 "BriefDescription": "Level 1 data cache long-latency read miss"
[all …]
/linux-6.14.4/drivers/staging/media/ipu3/include/uapi/
Dintel-ipu3.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
17 /* from include/uapi/linux/v4l2-controls.h */
26 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
34 * struct ipu3_uapi_grid_config - Grid plane config
56 * create a grid-based output, and the data is then divided into "slices".
71 * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB
108 * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer
119 * struct ipu3_uapi_awb_config_s - AWB config
[all …]
/linux-6.14.4/Documentation/scheduler/
Dsched-deadline.rst12 3. Scheduling Real-Time Tasks
18 4.1 System-wide settings
33 system behavior. As for -rt (group) scheduling, it is assumed that root users
50 ------------------
70 with the "traditional" real-time task model (see Section 3) can effectively
76 - Each SCHED_DEADLINE task is characterized by the "runtime",
79 - The state of the task is described by a "scheduling deadline", and
82 - When a SCHED_DEADLINE task wakes up (becomes ready for execution),
86 ---------------------------------- > ---------
87 scheduling deadline - current time period
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/linux-6.14.4/Documentation/admin-guide/device-mapper/
Dvdo-design.rst1 .. SPDX-License-Identifier: GPL-2.0-only
4 Design of dm-vdo
7 The dm-vdo (virtual data optimizer) target provides inline deduplication,
8 compression, zero-block elimination, and thin provisioning. A dm-vdo target
12 production environments ever since. It was made open-source in 2017 after
14 dm-vdo. For usage, see vdo.rst in the same directory as this file.
25 The design of dm-vdo is based on the idea that deduplication is a two-part
27 storing multiple copies of those duplicates. Therefore, dm-vdo has two main
34 -------------------
41 design attempts to be lock-free.
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/linux-6.14.4/Documentation/arch/x86/
Dtdx.rst1 .. SPDX-License-Identifier: GPL-2.0
18 CPU-attested software module called 'the TDX module' runs inside the new
22 TDX also leverages Intel Multi-Key Total Memory Encryption (MKTME) to
23 provide crypto-protection to the VMs. TDX reserves part of MKTME KeyIDs
32 TDX boot-time detection
33 -----------------------
41 ---------------------------------------
59 Besides initializing the TDX module, a per-cpu initialization SEAMCALL
103 ------------------------------------------
110 of memory regions (out of CMRs) as "TDX-usable" memory and pass those
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