Searched +full:mt8195 +full:- +full:scp_adsp (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/mediatek,mt8195-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek Functional Clock Controller for MT819510 - Chun-Jie Chen <chun-[email protected]>14 PLLs -->15 dividers -->17 -->26 - enum:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only4 // Author: Chun-Jie Chen <chun-[email protected]>6 #include "clk-gate.h"7 #include "clk-mtk.h"9 #include <dt-bindings/clock/mt8195-clk.h>10 #include <linux/clk-provider.h>33 .compatible = "mediatek,mt8195-scp_adsp",45 .name = "clk-mt8195-scp_adsp",51 MODULE_DESCRIPTION("MediaTek MT8195 SCP AudioDSP clocks driver");
1 # SPDX-License-Identifier: GPL-2.0-only397 to PCI-E and USB.427 to PCI-E and USB.891 tristate "Clock driver for MediaTek MT8192 scp_adsp"895 This driver supports MediaTek MT8192 scp_adsp clocks.912 bool "Clock driver for MediaTek MT8195"918 This driver supports MediaTek MT8195 clocks.921 tristate "Clock driver for MediaTek MT8195 apusys"925 This driver supports MediaTek MT8195 AI Processor Unit System clocks.928 tristate "Clock driver for MediaTek MT8195 imp_iic_wrap"[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o5 obj-$(CONFIG_COMMON_CLK_MT6735) += clk-mt6735-apmixedsys.o clk-mt6735-infracfg.o clk-mt6735-pericfg…6 obj-$(CONFIG_COMMON_CLK_MT6735_IMGSYS) += clk-mt6735-imgsys.o7 obj-$(CONFIG_COMMON_CLK_MT6735_MFGCFG) += clk-mt6735-mfgcfg.o8 obj-$(CONFIG_COMMON_CLK_MT6735_VDECSYS) += clk-mt6735-vdecsys.o9 obj-$(CONFIG_COMMON_CLK_MT6735_VENCSYS) += clk-mt6735-vencsys.o10 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o11 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Mediatek mt8195 DSP core10 - YC Hung <[email protected]>13 Some boards from mt8195 contain a DSP core used for14 advanced pre- and post- audio processing.18 const: mediatek,mt8195-dsp22 - description: Address and size of the DSP Cfg registers[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Mediatek AFE PCM controller for mt819510 - Trevor Wu <[email protected]>14 const: mediatek,mt8195-audio25 reset-names:28 memory-region:31 Shared memory region for AFE memif. A "shared-dma-pool".[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8195-clk.h>9 #include <dt-bindings/gce/mt8195-gce.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/memory/mt8195-memory-port.h>13 #include <dt-bindings/phy/phy.h>14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>15 #include <dt-bindings/power/mt8195-power.h>[all …]