Searched +full:msm8998 +full:- +full:mdss (Results 1 – 10 of 10) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/display/msm/ |
D | qcom,msm8998-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8998 Display MDSS 10 - AngeloGioacchino Del Regno <[email protected]> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 15 bindings of MDSS are mentioned for MSM8998 target. 17 $ref: /schemas/display/msm/mdss-common.yaml# [all …]
|
D | qcom,msm8998-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DPU on MSM8998 10 - AngeloGioacchino Del Regno <[email protected]> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,msm8998-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for regdma register set [all …]
|
D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <[email protected]> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl [all …]
|
/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/firmware/qcom,scm.h> 10 #include <dt-bindings/power/qcom-rpmpd.h> 11 #include <dt-bindings/gpio/gpio.h> 14 interrupt-parent = <&intc>; [all …]
|
D | msm8998-xiaomi-sagit.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi 10 /dts-v1/; 12 #include "msm8998.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/leds/common.h> 18 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 21 * Delete following upstream (msm8998.dtsi) reserved 24 /delete-node/ &adsp_mem; 25 /delete-node/ &mpss_mem; [all …]
|
D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/firmware/qcom,scm.h> 12 #include <dt-bindings/interconnect/qcom,sdm660.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
|
/linux-6.14.4/drivers/iommu/arm/arm-smmu/ |
D | arm-smmu-qcom.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/adreno-smmu-priv.h> 14 #include "arm-smmu.h" 15 #include "arm-smmu-qcom.h" 17 #define QCOM_DUMMY_VAL -1 20 * SMMU-500 TRM defines BIT(0) as CMTLB (Enable context caching in the 38 { .compatible = "qcom,adreno-gmu", 40 { .compatible = "qcom,adreno-smmu", 44 { .compatible = "qcom,sc7280-mdss", 46 { .compatible = "qcom,sc7280-venus", [all …]
|
/linux-6.14.4/drivers/gpu/drm/msm/ |
D | msm_mdss.c | 2 * SPDX-License-Identifier: GPL-2.0 22 #include <generated/mdss.xml.h> 26 #define DEFAULT_REG_BW 153600 /* Used in mdss fbdev driver */ 52 path0 = devm_of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path() 56 msm_mdss->mdp_path[0] = path0; in msm_mdss_parse_data_bus_icc_path() 57 msm_mdss->num_mdp_paths = 1; in msm_mdss_parse_data_bus_icc_path() 59 path1 = devm_of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path() 61 msm_mdss->mdp_path[1] = path1; in msm_mdss_parse_data_bus_icc_path() 62 msm_mdss->num_mdp_paths++; in msm_mdss_parse_data_bus_icc_path() 65 reg_bus_path = of_icc_get(dev, "cpu-cfg"); in msm_mdss_parse_data_bus_icc_path() [all …]
|
/linux-6.14.4/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_kms.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 13 #include <linux/dma-buf.h> 65 struct dpu_kms *kms = s->private; in _dpu_danger_signal_status() 68 if (!kms->hw_mdp) { in _dpu_danger_signal_status() 75 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status() 78 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status() 79 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status() 83 if (kms->hw_mdp->ops.get_safe_status) in _dpu_danger_signal_status() 84 kms->hw_mdp->ops.get_safe_status(kms->hw_mdp, in _dpu_danger_signal_status() [all …]
|
/linux-6.14.4/drivers/clk/qcom/ |
D | mmcc-msm8998.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/clk-provider.h> 14 #include <linux/reset-controller.h> 16 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 19 #include "clk-regmap.h" 20 #include "clk-regmap-divider.h" 21 #include "clk-alpha-pll.h" 22 #include "clk-rcg.h" 23 #include "clk-branch.h" 2575 .name = "mdss", [all …]
|