| /aosp_15_r20/external/python/cpython2/Doc/library/ |
| D | msilib.rst | 11 .. index:: single: msi
15 The :mod:`msilib` supports the creation of Microsoft Installer (``.msi``) files.
18 currently not implemented; read support for the ``.msi`` database is possible.
20 This package aims to provide complete access to all tables in an ``.msi`` file,
27 routines, low-level MSI routines, higher-level MSI routines, and standard table
40 Callbacks to Python for the various steps of MSI creation are currently not
53 name of the MSI file; *persist* can be one of the constants
85 The *table* argument must be one of the predefined tables in the MSI schema,
120 Return a new UUID, in the format that MSI typically requires (i.e. in curly
157 …`MSIDatabaseOpenView <https://msdn.microsoft.com/library?url=/library/en-us/msi/setup/msidatabaseo…
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| /aosp_15_r20/external/python/cpython3/Tools/msi/ |
| D | purge.py | 31 "core.msi",
32 "core_d.msi",
33 "core_pdb.msi",
34 "dev.msi",
35 "dev_d.msi",
36 "doc.msi",
37 "exe.msi",
38 "exe_d.msi",
39 "exe_pdb.msi",
40 "launcher.msi",
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| D | README.txt | 4 For testing, the installer should be built with the Tools/msi/build.bat
10 Tools/msi/buildrelease.bat script and environment variables:
42 CAB and MSI files and a single EXE.
48 Each MSI contains the logic required to install a component or feature
53 embedded into their associated MSI and are never seen by users.
57 associated MSI is not downloaded. This allows the installer to offer
65 Tools\msi\get_externals.bat. (Note that this is in addition to the
76 For testing, the installer should be built with the Tools/msi/build.bat
101 Tools/msi/buildrelease.bat script:
226 Packages appear as subdirectories of Tools/msi (other than the bundle/
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| D | buildrelease.bat | 29 rem {msi} MSI filename core.msi
30 set DOWNLOAD_URL=https://www.python.org/ftp/python/{version}/{arch}{releasename}/{msi}
70 if "%1" EQU "--skip-msi" (set BUILDMSI=) && shift && goto CheckOpts
185 ) else if not exist "%Py_OutDir%win32\en-us\launcher.msi" (
240 echo --skip-msi Do not build executable/MSI packages
261 echo {msi} MSI filename core.msi
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| /aosp_15_r20/external/flashrom/ |
| H A D | known_boards.c | 455 B("MSI", "MS-6153", OK, "http://www.msi.com/product/mb/MS-6153.html", NULL),
456 …B("MSI", "MS-6156", OK, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboar…
457 B("MSI", "MS-6163 (MS-6163 Pro)",OK, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
458 …B("MSI", "MS-6178", BAD, "http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if…
459 B("MSI", "MS-6330 (K7T Turbo)", OK, "http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
460 B("MSI", "MS-6391 (845 Pro4)", OK, "http://www.msi.com/product/mb/845-Pro4.html", NULL),
461 B("MSI", "MS-6561 (745 Ultra)", OK, "http://www.msi.com/product/mb/745-Ultra.html", NULL),
462 B("MSI", "MS-6566 (845 Ultra-C)",OK, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
463 B("MSI", "MS-6570 (K7N2)", OK, "http://www.msi.com/product/mb/K7N2.html", NULL),
464 …B("MSI", "MS-6577 (Xenon)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&c…
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| /aosp_15_r20/external/crosvm/devices/src/pci/ |
| H A D | msix.rs | 59 /// Wrapper over MSI-X Capability Structure and MSI-X Tables
153 /// Get the number of MSI-X vectors in this configuration.
178 /// Check whether the MSI-X Enable bit in Message Control word in set or not.
179 /// if 1, the function is permitted to use MSI-X to request service.
184 /// Read the MSI-X Capability Structure.
200 /// Write to the MSI-X Capability Structure.
213 error!("failed to enable MSI-X: {}", e); in write_msix_capability()
220 // pending MSI-X message to inject, given that the vector is not in write_msix_capability()
234 "invalid write to MSI-X Capability Structure offset {:x}", in write_msix_capability()
262 /// restore all data exposed via MMIO, and recreate all MSI-X vectors (they
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| H A D | msi.rs | 24 // MSI registers
27 const PCI_MSI_FLAGS_ENABLE: u16 = 0x0001; // MSI feature enabled
30 const PCI_MSI_ADDRESS_LO: u32 = 0x4; // MSI address lower 32 bits
31 const PCI_MSI_ADDRESS_HI: u32 = 0x8; // MSI address upper 32 bits (if 64 bit allowed)
35 // MSI length
47 /// Wrapper over MSI Capability Structure
120 // write msi ctl in write_msi_capability()
176 error!("Add msi route but gsi is none"); in add_msi_route()
255 /// Return the raw descriptor of the MSI device socket
334 /// MSI Capability Structure
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| /aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/ |
| H A D | stm32l4xx_hal_rcc.c | 22 all peripherals mapped on these busses are running at MSI speed.
141 (HSE, HSI, LSE, MSI, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
148 (+) MSI (Mutiple Speed Internal): Its frequency is software trimmable from 100KHZ to 48MHZ.
150 … The number of flash wait states is automatically adjusted when MSI range is updated with
151 HAL_RCC_OscConfig() and the MSI is used as System clock source.
161 (+) PLL (clocked by HSI, HSE or MSI) providing up to three independent output clocks:
168 (+) PLLSAI1 (clocked by HSI, HSE or MSI) providing up to three independent output clocks:
175 (+) PLLSAI2 (clocked by HSI , HSE or MSI) providing up to two independent output clocks:
186 (+) MCO (microcontroller clock output): used to output MSI, LSI, HSI, LSE, HSE or
190 (+) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
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| /aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/ |
| H A D | stm32l4xx_hal_rcc.c | 22 all peripherals mapped on these busses are running at MSI speed.
141 (HSE, HSI, LSE, MSI, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
148 (+) MSI (Mutiple Speed Internal): Its frequency is software trimmable from 100KHZ to 48MHZ.
150 … The number of flash wait states is automatically adjusted when MSI range is updated with
151 HAL_RCC_OscConfig() and the MSI is used as System clock source.
161 (+) PLL (clocked by HSI, HSE or MSI) providing up to three independent output clocks:
168 (+) PLLSAI1 (clocked by HSI, HSE or MSI) providing up to three independent output clocks:
175 (+) PLLSAI2 (clocked by HSI , HSE or MSI) providing up to two independent output clocks:
186 (+) MCO (microcontroller clock output): used to output MSI, LSI, HSI, LSE, HSE or
190 (+) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
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| /aosp_15_r20/external/python/cpython3/.azure-pipelines/windows-release/ |
| D | msi-steps.yml | 89 call Tools\msi\get_externals.bat
102 %MSBUILD% Tools\msi\launcher\launcher.wixproj
109 %MSBUILD% Tools\msi\bundle\releaselocal.wixproj /t:Rebuild /p:RebuildAll=true
121 %MSBUILD% Tools\msi\bundle\releaselocal.wixproj /t:Rebuild /p:RebuildAll=true
133 %MSBUILD% Tools\msi\bundle\releaselocal.wixproj /t:Rebuild /p:RebuildAll=true
147 displayName: 'Assemble artifact: msi (win32)'
150 targetFolder: $(Build.ArtifactStagingDirectory)\msi\win32
152 *.msi
157 displayName: 'Assemble artifact: msi (amd64)'
160 targetFolder: $(Build.ArtifactStagingDirectory)\msi\amd64
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| D | stage-publish-pythonorg.yml | 37 displayName: 'Download artifact from ${{ parameters.BuildToPublish }}: msi'
39 artifactName: msi
40 targetPath: $(Build.BinariesDirectory)\msi
67 displayName: 'Download artifact: msi'
69 artifactName: msi
70 targetPath: $(Build.BinariesDirectory)\msi
96 $files = gci -File "msi\*\*", "embed\*.zip"
115 $(Build.SourcesDirectory)\Tools\msi\uploadrelease.ps1
116 -build msi
130 "$(Build.SourcesDirectory)\Tools\msi\purge.py"
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| /aosp_15_r20/external/coreboot/src/vendorcode/cavium/include/bdk/libbdk-arch/ |
| H A D | bdk-csrs-pccpf.h | 1668 … : 1; /**< [ 2: 2](R/W) Bus master enable. If set, function may initiate upstream DMA or MSI-X
1677 … pcc__blk_masterena=0. In addition, PCC will not generate GIB (MSI-X)
1688 … : 1; /**< [ 2: 2](R/W) Bus master enable. If set, function may initiate upstream DMA or MSI-X
1697 … pcc__blk_masterena=0. In addition, PCC will not generate GIB (MSI-X)
1736 …uint32_t ncp : 8; /**< [ 15: 8](RO) Next capability pointer. If MSI-X is suppo…
1741 …uint32_t ncp : 8; /**< [ 15: 8](RO) Next capability pointer. If MSI-X is suppo…
1754 …uint32_t ncp : 8; /**< [ 15: 8](RO) Next capability pointer. If MSI-X is suppo…
1759 …uint32_t ncp : 8; /**< [ 15: 8](RO) Next capability pointer. If MSI-X is suppo…
1772 …uint32_t ncp : 8; /**< [ 15: 8](RO/H) Next capability pointer. If MSI-X is sup…
1777 …uint32_t ncp : 8; /**< [ 15: 8](RO/H) Next capability pointer. If MSI-X is sup…
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| H A D | bdk-csrs-rvu.h | 59 * Enumerates the MSI-X interrupt vectors.
62 * messages for it without accessing the MSI-X table region in LLC/DRAM.
197 * Enumerates the MSI-X interrupt vectors.
208 * Enumerates the MSI-X interrupt vectors.
269 * RVU MSI-X Vector Structure
270 * Format of entries in the RVU MSI-X table region in LLC/DRAM. See
279 …uint64_t addr : 64; /**< [ 63: 0] IOVA to use for MSI-X delivery of this vector.…
282 …uint64_t addr : 64; /**< [ 63: 0] IOVA to use for MSI-X delivery of this vector.…
287 … uint64_t pend : 1; /**< [ 97: 97] Vector's pending bit in the MSI-X PBA. */
288 …uint64_t mask : 1; /**< [ 96: 96] When set, no MSI-X interrupts are sent to this…
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| /aosp_15_r20/external/python/cpython3/Doc/library/ |
| D | msilib.rst | 14 .. index:: single: msi
22 The :mod:`msilib` supports the creation of Microsoft Installer (``.msi``) files.
25 currently not implemented; read support for the ``.msi`` database is possible.
27 This package aims to provide complete access to all tables in an ``.msi`` file,
33 routines, low-level MSI routines, higher-level MSI routines, and standard table
46 Callbacks to Python for the various steps of MSI creation are currently not
59 name of the MSI file; *persist* can be one of the constants
91 The *table* argument must be one of the predefined tables in the MSI schema,
125 Return a new UUID, in the format that MSI typically requires (i.e. in curly
325 All wrappers around MSI functions raise :exc:`MSIError`; the string inside the
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| /aosp_15_r20/external/coreboot/src/soc/cavium/cn81xx/ |
| H A D | ecam0.c | 128 * pci_enable_msix - configure device's MSI-X capability structure
129 * @dev: pointer to the pci_dev data structure of MSI-X device function
130 * @entries: pointer to an array of MSI-X entries
131 * @nvec: number of MSI-X irqs requested for allocation by device driver
133 * Setup the MSI-X capability structure of device function with the number
135 * MSI-X mode enabled on its hardware device function. A return of zero
136 * indicates the successful configuration of MSI-X capability structure.
139 * of irqs or MSI-X vectors available. Driver should use the returned value to
160 printk(BIOS_ERR, "%s: Device not MSI-X capable\n", in ecam0_pci_enable_msix()
171 /* Ensure MSI-X is disabled while it is set up */ in ecam0_pci_enable_msix()
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| /aosp_15_r20/external/trusty/arm-trusted-firmware/fdts/ |
| D | morello-soc.dts | 149 msi-parent = <&its2 0>;
172 msi-map = <0 &its_pcie 0 0x10000>;
185 msi-parent = <&its1 0>;
208 msi-map = <0 &its_ccix 0 0x10000>;
465 its1: msi-controller@30040000 {
467 msi-controller;
468 #msi-cells = <1>;
472 its2: msi-controller@30060000 {
474 msi-controller;
475 #msi-cells = <1>;
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| D | n1sdp.dtsi | 104 msi-controller;
105 #msi-cells = <1>;
111 msi-controller;
112 #msi-cells = <1>;
118 msi-controller;
119 #msi-cells = <1>;
125 msi-controller;
126 #msi-cells = <1>;
138 msi-parent = <&its1 0>;
150 msi-parent = <&its2 0>;
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| /aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
| H A D | stm32l4xx_hal_rcc.h | 91 …* @brief RCC Internal/External Oscillator (HSE, HSI, MSI, LSE and LSI) configuration structure de…
114 uint32_t MSIState; /*!< The new state of the MSI.
120 uint32_t MSIClockRange; /*!< The MSI frequency range.
178 #define RCC_OSCILLATORTYPE_MSI 0x00000010U /*!< MSI to configure */
232 /** @defgroup RCC_MSI_Config MSI Config
235 #define RCC_MSI_OFF 0x00000000U /*!< MSI clock deactivation */
236 #define RCC_MSI_ON RCC_CR_MSION /*!< MSI clock activation */
238 #define RCC_MSICALIBRATION_DEFAULT 0U /*!< Default MSI calibration trimming value */
340 #define RCC_PLLSOURCE_MSI RCC_PLLCFGR_PLLSRC_MSI /*!< MSI clock selected as PLL entry…
391 /** @defgroup RCC_MSI_Clock_Range MSI Clock Range
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| /aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
| H A D | stm32l4xx_hal_rcc.h | 91 …* @brief RCC Internal/External Oscillator (HSE, HSI, MSI, LSE and LSI) configuration structure de…
114 uint32_t MSIState; /*!< The new state of the MSI.
120 uint32_t MSIClockRange; /*!< The MSI frequency range.
178 #define RCC_OSCILLATORTYPE_MSI 0x00000010U /*!< MSI to configure */
232 /** @defgroup RCC_MSI_Config MSI Config
235 #define RCC_MSI_OFF 0x00000000U /*!< MSI clock deactivation */
236 #define RCC_MSI_ON RCC_CR_MSION /*!< MSI clock activation */
238 #define RCC_MSICALIBRATION_DEFAULT 0U /*!< Default MSI calibration trimming value */
340 #define RCC_PLLSOURCE_MSI RCC_PLLCFGR_PLLSRC_MSI /*!< MSI clock selected as PLL entry…
391 /** @defgroup RCC_MSI_Clock_Range MSI Clock Range
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| /aosp_15_r20/external/arm-trusted-firmware/fdts/ |
| H A D | n1sdp.dtsi | 104 msi-controller;
105 #msi-cells = <1>;
111 msi-controller;
112 #msi-cells = <1>;
118 msi-controller;
119 #msi-cells = <1>;
125 msi-controller;
126 #msi-cells = <1>;
138 msi-parent = <&its1 0>;
150 msi-parent = <&its2 0>;
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| /aosp_15_r20/external/crosvm/docs/book/src/architecture/ |
| H A D | interrupts.md | 13 - MSI: message signaled interrupts. In this document, synonymous with MSI-X.
14 - MSI-X: message signaled interrupts - extended
17 - IOAPIC: IO APIC (has physical interrupt lines, which it responds to by triggering an MSI directed
23 Interrupts on `x86_64` in CrosVM come in two primary flavors: legacy and MSI-X. In this document,
24 MSI is used to refer to the concept of message signaled interrupts, but it always refers to
25 interrupts sent via MSI-X because that is what CrosVM uses.
69 EOI is not meaningful for MSIs because lines are *never* shared. No devices using MSI will listen
77 after early boot, every interrupt is a MSI.
131 `Event`, and the MSI is also an `Event`. These interrupts are processed twice by the IRQ handler:
132 once as a legacy IOAPIC event, and a second time as an MSI.
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| /aosp_15_r20/external/crosvm/devices/src/irqchip/ |
| H A D | x86_64.rs | 165 /// * one IrqSource::Msi route; or
178 /// they're both `IrqSource::Msi`. Returns Err if an `IrqSource::Irqchip` and `IrqSource::Msi`
183 // We keep an invariant that legacy and MSI routes can't be mixed on the same GSI. in add()
184 // Irqchip routes are only on GSIs [0..24) and Msi routes are only on GSIs >= 24. This in add()
186 // outgoing Msi routes can't trigger each other in a cycle. in add()
243 // If they're both MSI then they conflict. in conflict()
244 if let (Msi { .. }, Msi { .. }) = (source, other) { in conflict()
264 /// IrqSource::Msi).
269 (Irqchip { .. }, Irqchip { .. }) | (Msi { .. }, Msi { .. }) in same_source()
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| /aosp_15_r20/prebuilts/go/linux-x86/test/ |
| D | map.go | 52 msi := make(map[string]int)
89 msi[s] = i
116 if len(msi) != count {
117 panic(fmt.Sprintf("len(msi) = %d\n", len(msi)))
168 if msi[s] != i {
169 panic(fmt.Sprintf("msi[%s] = %d\n", s, msi[s]))
255 _, b := msi[s]
257 panic(fmt.Sprintf("tuple existence decl: msi[%d]\n", i))
259 _, b = msi[s]
261 panic(fmt.Sprintf("tuple existence assign: msi[%d]\n", i))
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| /aosp_15_r20/packages/apps/Settings/tests/unit/src/com/android/settings/applications/specialaccess/notificationaccess/ |
| D | TypeFilterPreferenceControllerTest.java | 65 ServiceInfo mSi = new ServiceInfo(); field in TypeFilterPreferenceControllerTest
87 mController.setServiceInfo(mSi); in setUp()
141 mSi.metaData = new Bundle(); in updateState_enabled_metaData_notTheDisableFilter()
142 mSi.metaData.putCharSequence("test", "value"); in updateState_enabled_metaData_notTheDisableFilter()
153 mSi.metaData = new Bundle(); in updateState_enabled_metaData_disableFilter_notThisField()
154 mSi.metaData.putCharSequence(NotificationListenerService.META_DATA_DISABLED_FILTER_TYPES, in updateState_enabled_metaData_disableFilter_notThisField()
166 mSi.metaData = new Bundle(); in updateState_enabled_metaData_disableFilter_thisField_stateIsChecked()
167 mSi.metaData.putCharSequence(NotificationListenerService.META_DATA_DISABLED_FILTER_TYPES, in updateState_enabled_metaData_disableFilter_thisField_stateIsChecked()
190 mSi.metaData = new Bundle(); in updateState_disabled_metaData_disableFilter_thisField_stateIsNotChecked()
191 mSi.metaData.putCharSequence(NotificationListenerService.META_DATA_DISABLED_FILTER_TYPES, in updateState_disabled_metaData_disableFilter_thisField_stateIsNotChecked()
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| /aosp_15_r20/cts/tests/tests/renderscript/src/android/renderscript/cts/ |
| H A D | IntrinsicColorMatrix.java | 23 protected ScriptIntrinsicColorMatrix mSi; field in IntrinsicColorMatrix
28 if (mSi != null) { in tearDown()
29 mSi.destroy(); in tearDown()
45 if (mSi == null) { in subtest()
46 mSi = ScriptIntrinsicColorMatrix.create(mRS, Element.U8_4(mRS)); in subtest()
66 mSi.setColorMatrix(mat); in subtest()
67 mSi.setAdd(add); in subtest()
69 mSi.forEach(mAllocSrc, mAllocDst, makeClipper(x1, y1, x2, y2)); in subtest()
71 mSi.forEach(mAllocSrc, mAllocDst); in subtest()
|