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/linux-6.14.4/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c2 * Copyright 2013 Advanced Micro Devices, Inc.
34 struct radeon_device *rdev = encoder->dev->dev_private; in dce3_2_afmt_hdmi_write_speaker_allocation()
52 struct radeon_device *rdev = encoder->dev->dev_private; in dce3_2_afmt_dp_write_speaker_allocation()
71 struct radeon_device *rdev = encoder->dev->dev_private; in dce3_2_afmt_write_sad_regs()
90 int max_channels = -1; in dce3_2_afmt_write_sad_regs()
96 if (sad->format == eld_reg_to_type[i][1]) { in dce3_2_afmt_write_sad_regs()
97 if (sad->channels > max_channels) { in dce3_2_afmt_write_sad_regs()
98 value = MAX_CHANNELS(sad->channels) | in dce3_2_afmt_write_sad_regs()
99 DESCRIPTOR_BYTE_2(sad->byte2) | in dce3_2_afmt_write_sad_regs()
100 SUPPORTED_FREQUENCIES(sad->freq); in dce3_2_afmt_write_sad_regs()
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Devergreen_hdmi.c2 * Copyright 2008 Advanced Micro Devices, Inc.
72 struct drm_device *dev = encoder->dev; in evergreen_hdmi_update_acr()
73 struct radeon_device *rdev = dev->dev_private; in evergreen_hdmi_update_acr()
76 if (encoder->crtc) { in evergreen_hdmi_update_acr()
77 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_hdmi_update_acr()
78 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
89 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
90 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
92 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
93 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); in evergreen_hdmi_update_acr()
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Dr600_hdmi.c2 * Copyright 2008 Advanced Micro Devices, Inc.
88 dev_err(rdev->dev, "Unknown bits per sample 0x%x, using 16\n", in r600_audio_status()
124 if (rdev->audio.pin[0].channels != audio_status.channels || in r600_audio_update_hdmi()
125 rdev->audio.pin[0].rate != audio_status.rate || in r600_audio_update_hdmi()
126 rdev->audio.pin[0].bits_per_sample != audio_status.bits_per_sample || in r600_audio_update_hdmi()
127 rdev->audio.pin[0].status_bits != audio_status.status_bits || in r600_audio_update_hdmi()
128 rdev->audio.pin[0].category_code != audio_status.category_code) { in r600_audio_update_hdmi()
129 rdev->audio.pin[0] = audio_status; in r600_audio_update_hdmi()
133 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { in r600_audio_update_hdmi()
174 /* only one pin on 6xx-NI */ in r600_audio_get_pin()
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/linux-6.14.4/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_psr.c2 * Copyright 2021 Advanced Micro Devices, Inc.
35 struct dc *dc = link->ctx->dc; in link_supports_psrsu()
37 if (!dc->caps.dmcub_support) in link_supports_psrsu()
40 if (dc->ctx->dce_version < DCN_VERSION_3_1) in link_supports_psrsu()
46 if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP || in link_supports_psrsu()
47 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) in link_supports_psrsu()
50 if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED && in link_supports_psrsu()
51 !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap) in link_supports_psrsu()
57 /* Temporarily disable PSR-SU to avoid glitches */ in link_supports_psrsu()
62 * amdgpu_dm_set_psr_caps() - set link psr capabilities
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Damdgpu_dm_crc.h2 * Copyright 2019 Advanced Micro Devices, Inc.
39 AMDGPU_DM_PIPE_CRC_SOURCE_INVALID = -1,
85 /* skip reading/writing for few frames */
/linux-6.14.4/drivers/gpu/drm/amd/display/dc/opp/dcn10/
Ddcn10_opp.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
32 (oppn10->regs->reg)
36 oppn10->opp_shift->field_name, oppn10->opp_mask->field_name
39 oppn10->base.ctx
55 FMT_TRUNCATE_EN, params->flags.TRUNCATE_ENABLED, in opp1_set_truncation()
56 FMT_TRUNCATE_DEPTH, params->flags.TRUNCATE_DEPTH, in opp1_set_truncation()
57 FMT_TRUNCATE_MODE, params->flags.TRUNCATE_MODE); in opp1_set_truncation()
76 if (params->flags.FRAME_RANDOM == 1) { in opp1_set_spatial_dither()
77 if (params->flags.SPATIAL_DITHER_DEPTH == 0 || params->flags.SPATIAL_DITHER_DEPTH == 1) { in opp1_set_spatial_dither()
81 } else if (params->flags.SPATIAL_DITHER_DEPTH == 2) { in opp1_set_spatial_dither()
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/linux-6.14.4/drivers/net/wireless/intel/ipw2x00/
Dipw2100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
202 #define IPW2100_RSSI_TO_DBM (-98)
232 #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
250 * @struct _tx_cmd - HWCommand
280 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
389 (x)->value = (x)->hi = 0; \
390 (x)->lo = 0x7fffffff; \
393 (x)->value = y; \
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/linux-6.14.4/tools/usb/
Dhcd-tests.sh2 # SPDX-License-Identifier: GPL-2.0
6 # - control: any device can do this
7 # - out, in: out needs 'bulk sink' firmware, in needs 'bulk src'
8 # - iso-out, iso-in: out needs 'iso sink' firmware, in needs 'iso src'
9 # - halt: needs bulk sink+src, tests halt set/clear from host
10 # - unlink: needs bulk sink and/or src, test HCD unlink processing
11 # - loop: needs firmware that will buffer N transfers
25 # - include unlink tests
26 # - add some ${RANDOM}ness
27 # - connect several devices concurrently (same HC)
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/linux-6.14.4/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <[email protected]>
11 - Peng Fan <[email protected]>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nuvoton,npcm750-udc
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/linux-6.14.4/include/uapi/linux/can/
Disotp.h1 /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Definitions for ISO 15765-2 CAN transport protocol sockets
65 /* ignore received CF frames which */
98 /* 0x00 - 0x7F : 0 - 127 ms */
99 /* 0x80 - 0xF0 : reserved */
100 /* 0xF1 - 0xF9 : 100 us - 900 us */
101 /* 0xFA - 0xFF : reserved */
111 /* CAN_MTU (16) -> standard CAN 2.0 */
112 /* CANFD_MTU (72) -> CAN FD frame */
138 #define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
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/linux-6.14.4/drivers/net/ethernet/amd/xgbe/
Dxgbe-ethtool.c9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
122 #include "xgbe-common.h"
201 for (i = 0; i < pdata->tx_ring_count; i++) { in xgbe_get_strings()
206 for (i = 0; i < pdata->rx_ring_count; i++) { in xgbe_get_strings()
222 pdata->hw_if.read_mmc_stats(pdata); in xgbe_get_ethtool_stats()
227 for (i = 0; i < pdata->tx_ring_count; i++) { in xgbe_get_ethtool_stats()
228 *data++ = pdata->ext_stats.txq_packets[i]; in xgbe_get_ethtool_stats()
229 *data++ = pdata->ext_stats.txq_bytes[i]; in xgbe_get_ethtool_stats()
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/linux-6.14.4/drivers/accel/amdxdna/
Daie2_solver.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2023-2024, Advanced Micro Devices, Inc.
33 u32 fps; /* Frames per second */
74 * Power levels 0 - n, is a step increase in system frequencies
118 * xrsm_init() - Register resource solver. Resource solver client needs
130 * xrs_allocate_resource() - Request to allocate resources for a given context
149 * xrs_release_resource() - Request to free resources for a given context.
/linux-6.14.4/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <[email protected]>
11 - Giuseppe Cavallaro <[email protected]>
12 - Jose Abreu <[email protected]>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/linux-6.14.4/drivers/usb/host/
Dfhci.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * Jerry Huang <Chang-[email protected]>
45 #define PKT_PID_DATA0 0x80000000 /* PID - Data toggle zero */
46 #define PKT_PID_DATA1 0x40000000 /* PID - Data toggle one */
47 #define PKT_PID_SETUP 0x20000000 /* PID - Setup bit */
64 #define PKT_LOW_SPEED_PACKET 0x00001000 /* Low-Speed packet */
67 #define TRANS_INPROGRESS (-1)
68 #define TRANS_DISCARD (-2)
69 #define TRANS_FAIL (-3)
81 #define USB_TD_RX_ER_BITSTUFF 0x20000000 /* Frame Aborted-Received pkt */
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/dce/
Ddmub_replay.c1 // SPDX-License-Identifier: MIT
3 // Copyright 2024 Advanced Micro Devices, Inc.
29 if (!dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_REPLAY_STATE, panel_inst, in dmub_replay_get_state()
39 /* To-do: Add retry fail log */ in dmub_replay_get_state()
49 struct dc_context *dc = dmub->ctx; in dmub_replay_enable()
68 * Exit REPLAY may need to wait 1-2 frames to power up. Timeout after at in dmub_replay_enable()
69 * least a few frames. Should never hit the max retry assert below. in dmub_replay_enable()
83 /* must *not* be fsleep - this can be called from high irq levels */ in dmub_replay_enable()
99 struct dc_context *dc = dmub->ctx; in dmub_replay_set_power_opt()
120 struct dc_context *dc = dmub->ctx; in dmub_replay_copy_settings()
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Ddmub_psr.c2 * Copyright 2019 Advanced Micro Devices, Inc.
115 if (dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_PSR_STATE, panel_inst, &raw_state, in dmub_psr_get_state()
143 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
145 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) in dmub_psr_set_version()
151 switch (stream->link->psr_settings.psr_version) { in dmub_psr_set_version()
182 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
199 dc_wake_and_execute_dmub_cmd(dc->dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT); in dmub_psr_enable()
202 * Exit PSR may need to wait 1-2 frames to power up. Timeout after at in dmub_psr_enable()
203 * least a few frames. Should never hit the max retry assert below. in dmub_psr_enable()
217 /* must *not* be fsleep - this can be called from high irq levels */ in dmub_psr_enable()
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/linux-6.14.4/drivers/gpu/drm/amd/amdgpu/
Dpsp_gfx_if.h2 * Copyright 2017 Advanced Micro Devices, Inc.
46 GFX_CTRL_CMD_ID_ENABLE_INT = 0x00050000, /* enable PSP-to-Gfx interrupt */
47 GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */
57 /*-----------------------------------------------------------------------------
64 * SRBM-to-PSP mailbox registers (total 8 registers).
112 /* PSP boot config sub-commands */
194 uint32_t sriov_enabled:1; /* whether the device runs under SR-IOV*/
208 GFX_FW_TYPE_CP_ME = 1, /* CP-ME VG + RV */
209 GFX_FW_TYPE_CP_PFP = 2, /* CP-PFP VG + RV */
210 GFX_FW_TYPE_CP_CE = 3, /* CP-CE VG + RV */
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/linux-6.14.4/drivers/net/wireless/ath/ath10k/
Dwmi.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
29 * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
45 * variable is already 4-byte aligned by virtue of being a u32
527 * for wmi_services is 64 as target is using only 4-bits of each 32-bit
533 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
534 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
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/linux-6.14.4/Documentation/gpu/amdgpu/display/
Ddcn-overview.rst12 .. kernel-figure:: dc_pipeline_overview.svg
21 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel
26 multiple planes, using global or per-pixel alpha.
38 the display pipe back to memory as video frames.
40 * **Multi-Media HUB (MMHUBBUB)**: Memory controller interface for DMCUB and DWB
45 the Display Micro-Controller Unit - version B (DMCUB), which is handled via
86 ----------------------
102 a one-to-one mapping of the link encoder to PHY, but we can configure the DCN
108 ---------
116 representation and convert them to a DCN specific floating-point format (i.e.,
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/linux-6.14.4/include/uapi/drm/
Damdxdna_accel.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
23 AMDXDNA_DEV_TYPE_UNKNOWN = -1,
40 * struct qos_info - QoS information for driver.
42 * @fps: Frames per second.
60 * struct amdxdna_drm_create_hwctx - Create hardware context.
88 * struct amdxdna_drm_destroy_hwctx - Destroy hardware context.
98 * struct amdxdna_cu_config - configuration for one CU
110 * struct amdxdna_hwctx_param_config_cu - configuration for CUs in hardware context
128 * struct amdxdna_drm_config_hwctx - Configure hardware context.
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/linux-6.14.4/include/sound/
Demu10k1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/pcm-indirect.h>
25 /* ------------------- DEFINES -------------------- */
33 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */
41 // This is used to define hardware bit-fields (sub-registers) by combining
44 // The non-concatenating (_NC) variant should be used directly only for
45 // sub-registers that do not follow the <register>_<field> naming pattern.
55 // Macros for manipulating values of bit-fields declared using the above macros.
59 // single sub-register at a time.
62 #define REG_MASK0(r) ((1U << REG_SIZE(r)) - 1U)
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/linux-6.14.4/drivers/gpu/drm/amd/display/modules/freesync/
Dfreesync.c2 * Copyright 2016-2023 Advanced Micro Devices, Inc.
38 /* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */
44 /* Number of consecutive frames to check before entering/exiting fixed refresh */
72 core_freesync->dc = dc; in mod_freesync_create()
73 return &core_freesync->public; in mod_freesync_create()
119 * 10000) * stream->timing.h_total, in calc_duration_in_us_from_v_total()
120 stream->timing.pix_clk_100hz)); in calc_duration_in_us_from_v_total()
127 unsigned int max_hw_v_total = stream->ctx->dc->caps.max_v_total; in calc_max_hardware_v_total()
129 if (stream->ctx->dc->caps.vtotal_limited_by_fp2) { in calc_max_hardware_v_total()
130 max_hw_v_total -= stream->timing.v_front_porch + 1; in calc_max_hardware_v_total()
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/linux-6.14.4/drivers/gpu/drm/amd/include/ivsrcid/dcn/
Dirqsrcs_dcn_1_0.h2 * Copyright 2017 Advanced Micro Devices, Inc.
192 #define DCN_1_0__SRCID__DC_DAC_A_AUTO_DET 0xA // DAC A auto - detection DACA_AUTODETECT_GEN…
309 #define DCN_1_0__SRCID__DC_DIGA_FAST_TRAINING_COMPLETE_INT 0xF // DIGA - Fast Training Complete…
312 #define DCN_1_0__SRCID__DC_DIGB_FAST_TRAINING_COMPLETE_INT 0xF // DIGB - Fast Training Complete…
315 #define DCN_1_0__SRCID__DC_DIGC_FAST_TRAINING_COMPLETE_INT 0xF // DIGC - Fast Training Complete…
318 #define DCN_1_0__SRCID__DC_DIGD_FAST_TRAINING_COMPLETE_INT 0xF // DIGD - Fast Training Complete…
321 #define DCN_1_0__SRCID__DC_DIGE_FAST_TRAINING_COMPLETE_INT 0xF // DIGE - Fast Training Complete…
324 #define DCN_1_0__SRCID__DC_DIGF_FAST_TRAINING_COMPLETE_INT 0xF // DIGF - Fast Training Complete…
468 …gered when the time(number of refclk cycles) of a programmable number of frames is counted.The cou…
471 …gered when the time(number of refclk cycles) of a programmable number of frames is counted.The cou…
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/linux-6.14.4/drivers/usb/dwc2/
Dhcd_ddma.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * hcd_ddma.c - DesignWare HS OTG Controller descriptor DMA routines
5 * Copyright (C) 2004-2013 Synopsys, Inc.
15 #include <linux/dma-mapping.h>
28 return frame & (FRLISTEN_64_SIZE - 1); in dwc2_frame_list_idx()
35 MAX_DMA_DESC_NUM_GENERIC) - 1); in dwc2_desclist_idx_inc()
40 return (idx - inc) & in dwc2_desclist_idx_dec()
42 MAX_DMA_DESC_NUM_GENERIC) - 1); in dwc2_desclist_idx_dec()
47 return (qh->ep_type == USB_ENDPOINT_XFER_ISOC && in dwc2_max_desc_num()
48 qh->dev_speed == USB_SPEED_HIGH) ? in dwc2_max_desc_num()
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/linux-6.14.4/drivers/net/wireless/ath/ath11k/
Dhal.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.
28 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE (HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX - \
35 #define HAL_SHADOW_BASE_ADDR(ab) ab->hw_params.regs->hal_shadow_base_addr
47 (ab->hw_params.regs->hal_seq_wcss_umac_ce0_src_reg)
49 (ab->hw_params.regs->hal_seq_wcss_umac_ce0_dst_reg)
51 (ab->hw_params.regs->hal_seq_wcss_umac_ce1_src_reg)
53 (ab->hw_params.regs->hal_seq_wcss_umac_ce1_dst_reg)
62 #define HAL_TCL1_RING_BASE_LSB(ab) ab->hw_params.regs->hal_tcl1_ring_base_lsb
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