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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-controller.yaml#
14 - Andrew Davis <[email protected]>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
34 nvmem-cells:
40 nvmem-cell-names:
42 - const: io_impedance_ctrl
[all …]
Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-phy.yaml#
14 - Andrew Davis <[email protected]>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dcirrus,cs35l45.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <[email protected]>
11 - Richard Fitzgerald <[email protected]>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
31 '#sound-dai-cells':
34 reset-gpios:
37 vdd-a-supply:
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/linux-6.14.4/arch/arm64/boot/dts/renesas/
Dr9a09g057h44-rzv2h-evk.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h>
11 #include <dt-bindings/gpio/gpio.h>
16 compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
32 stdout-path = "serial0:115200n8";
47 compatible = "regulator-fixed";
49 regulator-name = "fixed-3.3V";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/omap/
Ddra71-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
7 #include "dra7-mmc-iodelay.dtsi"
8 #include "dra72x-mmc-iodelay.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
12 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
20 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 ipu2_memory_region: ipu2-memory@95800000 {
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Ddra72-evm-revc.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
5 #include "dra72-evm-common.dtsi"
6 #include "dra72x-mmc-iodelay.dtsi"
7 #include <dt-bindings/net/ti-dp83867.h>
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "shared-dma-pool";
30 compatible = "shared-dma-pool";
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Ddra76-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-evm-common.dtsi"
9 #include "dra76x-mmc-iodelay.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h>
14 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
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/linux-6.14.4/Documentation/devicetree/bindings/iio/addac/
Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <[email protected]>
13 The AD74115H is a single-channel software configurable input/output
15 analog output, analog input, digital output, digital input, resistance
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
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/linux-6.14.4/arch/arm64/boot/dts/marvell/
Dcn9131-cf-solidwan.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
29 #include "armada-cp115.dtsi"
41 compatible = "solidrun,cn9131-solidwan",
42 "solidrun,cn9130-sr-som", "marvell,cn9130";
67 compatible = "gpio-leds";
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/linux-6.14.4/Documentation/devicetree/bindings/mux/
Dmux-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <[email protected]>
20 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
21 0-7 for an 8-way multiplexer, etc.
25 --------------------
28 specifier using the '#mux-control-cells' or '#mux-state-cells' property.
29 The value of '#mux-state-cells' will always be one greater than the value
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/linux-6.14.4/drivers/phy/rockchip/
Dphy-rockchip-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com>
20 * The higher 16-bit of this register is used for write protection
106 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
107 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
111 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
112 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
121 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power()
146 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power()
151 * far off. Also warn if we're above the 200 MHz max. Don't in rockchip_emmc_phy_power()
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx8mp-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/net/ti-dp83867.h>
11 model = "PHYTEC phyCORE-i.MX8MP";
12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp";
24 reg_vdd_io: regulator-vdd-io {
25 compatible = "regulator-fixed";
26 regulator-always-on;
27 regulator-boot-on;
28 regulator-max-microvolt = <3300000>;
29 regulator-min-microvolt = <3300000>;
[all …]
Dimx8mp-aristainetos3a-som-v1.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/net/ti-dp83867.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/pwm/pwm.h>
13 model = "ADLINK LEC-iMX8MP-Q-N-4G-32G";
14 compatible = "abb,imx8mp-aristanetos3-som", "fsl,imx8mp";
25 stdout-path = &uart2;
29 compatible = "usb-c-connector";
30 label = "USB-C";
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/linux-6.14.4/sound/soc/codecs/
Dnau8825.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Co-author: Meng-Huang Kuo <[email protected]>
35 #define NUVOTON_CODEC_DAI "nau8825-hifi"
66 /* scaling for mclk from sysclk_src output */
223 * nau8825_sema_acquire - acquire the semaphore of nau88l25
233 * this function returns -ETIME. If the sleep is interrupted by a signal,
234 * this function will return -EINTR. It returns 0 if the semaphore was
246 ret = down_timeout(&nau8825->xtalk_sem, timeout); in nau8825_sema_acquire()
248 dev_warn(nau8825->dev, "Acquire semaphore timeout\n"); in nau8825_sema_acquire()
250 ret = down_trylock(&nau8825->xtalk_sem); in nau8825_sema_acquire()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/leds/
Dcommon.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <[email protected]>
11 - Pavel Machek <[email protected]>
18 Many LED devices expose more than one current output that can be connected
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
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/linux-6.14.4/arch/arm64/boot/dts/xilinx/
Dzynqmp-zcu102-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
[all …]
Dzynqmp-zcu106-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
[all …]
Dzynqmp-zcu111-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
[all …]
/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-am625-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-am62x-sk-common.dtsi"
13 compatible = "ti,am625-sk", "ti,am625";
16 opp-table {
17 /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
18 opp-1400000000 {
19 opp-hz = /bits/ 64 <1400000000>;
20 opp-supported-hw = <0x01 0x0004>;
[all …]
Dk3-am642-hummingboard-t.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
5 * DTS for SolidRun AM642 HummingBoard-T,
10 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-am642.dtsi"
16 #include "k3-am642-sr-som.dtsi"
19 model = "SolidRun AM642 HummingBoard-T";
20 compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642";
[all …]
Dk3-am62p5-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree file for the AM62P5-SK
4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/net/ti-dp83867.h>
14 #include "k3-am62p5.dtsi"
17 compatible = "ti,am62p5-sk", "ti,am62p5";
35 stdout-path = &main_uart0;
[all …]
/linux-6.14.4/drivers/net/phy/
Ddp83867.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/nvmem-consumer.h>
19 #include <dt-bindings/net/ti-dp83867.h>
212 struct net_device *ndev = phydev->attached_dev; in dp83867_set_wol()
219 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83867_set_wol()
224 if (wol->wolopts & WAKE_MAGIC) { in dp83867_set_wol()
225 mac = (const u8 *)ndev->dev_addr; in dp83867_set_wol()
228 return -EINVAL; in dp83867_set_wol()
242 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83867_set_wol()
244 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83867_set_wol()
[all …]
/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32mp135f-dk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
15 #include "stm32mp13-pinctrl.dtsi"
18 model = "STMicroelectronics STM32MP135F-DK Discovery Board";
19 compatible = "st,stm32mp135f-dk", "st,stm32mp135";
[all …]
/linux-6.14.4/drivers/platform/x86/x86-android-tablets/
Dlenovo.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 2021-2023 Hans de Goede <[email protected]>
27 #include "shared-psy-info.h"
28 #include "x86-android-tablets.h"
32 * input connected to a PWM output coming from the LCD panel's controller.
33 * The Android kernels have a hack in the i915 driver to write a non-standard
34 * panel specific DSI register to set the duty-cycle of the LCD's PWM output.
40 * the I2C register set level (requiring both to be at 100% for 100% output);
44 * when the panel goes off and turns off its PWM output.
46 * But on some models the panel's PWM output defaults to a duty-cycle of
[all …]

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