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/linux-6.14.4/Documentation/devicetree/bindings/display/
Dxylon,logicvc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Kocialkowski <[email protected]>
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
20 synthesis time. As a result, many of the device-tree bindings are meant to
24 Layers are declared in the "layers" sub-node and have dedicated configuration.
25 In version 3 of the controller, each layer has fixed memory offset and address
32 - xylon,logicvc-3.02.a-display
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/linux-6.14.4/drivers/gpu/drm/logicvc/
Dlogicvc_layer.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2022 Bootlin
52 .colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
57 .colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
62 .colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
86 struct drm_device *drm_dev = drm_plane->dev; in logicvc_plane_atomic_check()
87 struct logicvc_layer *layer = logicvc_layer(drm_plane); in logicvc_plane_atomic_check() local
96 if (!new_state->crtc) in logicvc_plane_atomic_check()
99 crtc_state = drm_atomic_get_existing_crtc_state(new_state->state, in logicvc_plane_atomic_check()
100 new_state->crtc); in logicvc_plane_atomic_check()
[all …]
Dlogicvc_of.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2022 Bootlin
14 { "lvds-4bits", LOGICVC_DISPLAY_INTERFACE_LVDS_4BITS },
15 { "lvds-3bits", LOGICVC_DISPLAY_INTERFACE_LVDS_3BITS },
33 { "layer", LOGICVC_LAYER_ALPHA_LAYER },
40 .name = "xylon,display-interface",
48 .name = "xylon,display-colorspace",
56 .name = "xylon,display-depth",
60 .name = "xylon,row-stride",
67 .name = "xylon,background-layer",
[all …]
Dlogicvc_layer.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2019-2022 Bootlin
27 u32 colorspace; member
36 u32 colorspace; member
53 struct logicvc_layer *layer,
/linux-6.14.4/drivers/gpu/drm/xlnx/
Dzynqmp_disp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <[email protected]>
9 * - Laurent Pinchart <[email protected]>
19 #include <linux/dma-mapping.h>
21 #include <linux/media-bus-format.h>
34 * --------
39 * +------------------------------------------------------------+
40 * +--------+ | +----------------+ +-----------+ |
41 * | DPDMA | --->| | --> | Video | Video +-------------+ |
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/linux-6.14.4/Documentation/devicetree/bindings/display/xlnx/
Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
45 /* Trigger Source Select - ASIC-defendant, actual values for the
74 /* Trigger Source Select - ASIC-dependant, actual values for the
188 /* disabling trigger-reset */
206 /* Combine with below and move YUV/RGB color conversion to SW layer */
210 /* Combine with above and move YUV/RGB color conversion to SW layer */
215 enum dc_color_space colorspace,
217 /*************** End-of-move ********************/
223 * because this is not DP-specific (which is probably somewhere in DP
/linux-6.14.4/drivers/media/pci/sta2x11/
Dsta2x11_vip.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <media/v4l2-common.h>
26 #include <media/v4l2-device.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-ioctl.h>
29 #include <media/v4l2-fh.h>
30 #include <media/v4l2-event.h>
31 #include <media/videobuf2-dma-contig.h>
86 * struct sta2x11_vip - All internal data for one instance of device
87 * @v4l2_dev: device registered in v4l layer
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/linux-6.14.4/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
52 * SSPP sub-blocks/features
54 …* @DPU_SSPP_SCALER_QSEED3_COMPATIBLE, QSEED3-compatible alogorithm support (includes QSEED3, QSEE…
57 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
58 * @DPU_SSPP_CURSOR, SSPP can be used as a cursor layer
60 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
90 * MIXER sub-blocks/features
91 * @DPU_MIXER_LAYER Layer mixer layer blend configuration,
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/linux-6.14.4/drivers/media/platform/ti/cal/
Dcal-video.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI Camera Access Layer (CAL) - Video Device
5 * Copyright (c) 2015-2020 Texas Instruments Inc.
16 #include <media/media-device.h>
17 #include <media/v4l2-common.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-event.h>
21 #include <media/v4l2-fh.h>
22 #include <media/v4l2-ioctl.h>
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Dcal-camerarx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI Camera Access Layer (CAL) - CAMERARX
5 * Copyright (c) 2015-2020 Texas Instruments Inc.
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-fwnode.h>
23 #include <media/v4l2-subdev.h>
28 /* ------------------------------------------------------------------
30 * ------------------------------------------------------------------
35 return ioread32(phy->base + offset); in camerarx_read()
40 iowrite32(val, phy->base + offset); in camerarx_write()
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddpp.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
36 * or a layer to be blended with other DPP, or a rectangle associated with a
40 * - graphic color keyer
41 * - graphic cursor compositing
42 * - graphic or video image source to destination scaling
43 * - image sharping
44 * - video format conversion from 4:2:0 or 4:2:2 to 4:4:4
45 * - Color Space Conversion
46 * - Host LUT gamma adjustment
47 * - Color Gamut Remap
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/linux-6.14.4/include/drm/
Ddrm_connector.h58 DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */
62 * enum drm_connector_status - status for a &drm_connector
77 * nothing there. It is driver-dependent whether a connector with this
84 * flicker (like load-detection when the connector is in use), or when a
85 * hardware resource isn't available (like when load-detection needs a
95 * enum drm_connector_registration_state - userspace registration status for
128 * - An unregistered connector may only have its DPMS changed from
129 * On->Off. Once DPMS is changed to Off, it may not be switched back
131 * - Modesets are not allowed on unregistered connectors, unless they
135 * - Removing a CRTC from an unregistered connector is OK, but new
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/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dhist-v4l2.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _hist-v4l2:
21 1998-08-20: First version.
23 1998-08-27: The :c:func:`select()` function was introduced.
25 1998-09-10: New video standard interface.
27 1998-09-18: The ``VIDIOC_NONCAP`` ioctl was replaced by the otherwise
36 1998-09-28: Revamped video standard. Made video controls individually
39 1998-10-02: The ``id`` field was removed from
47 1998-11-08: Many minor changes. Most symbols have been renamed. Some
50 1998-11-12: The read/write direction of some ioctls was misdefined.
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Dext-ctrls-codec-stateless.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-stateless-controls:
18 .. _codec-stateless-control-id:
23 .. _v4l2-codec-stateless-h264:
43 .. flat-table:: struct v4l2_ctrl_h264_sps
44 :header-rows: 0
45 :stub-columns: 0
48 * - __u8
49 - ``profile_idc``
50 -
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/linux-6.14.4/drivers/staging/vc04_services/bcm2835-camera/
Dbcm2835-camera.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/dma-mapping.h>
19 #include <media/videobuf2-vmalloc.h>
20 #include <media/videobuf2-dma-contig.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-fh.h>
25 #include <media/v4l2-event.h>
26 #include <media/v4l2-common.h>
[all …]
/linux-6.14.4/drivers/media/i2c/
Dtvp514x.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * Karicheri Muralidharan <m-[email protected]>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/media-entity.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-mediabus.h>
[all …]
/linux-6.14.4/drivers/media/platform/ti/omap3isp/
Dispvideo.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - Generic video node
7 * Copyright (C) 2009-2010 Nokia Corporation
22 #include <media/v4l2-dev.h>
23 #include <media/v4l2-ioctl.h>
24 #include <media/v4l2-mc.h>
25 #include <media/videobuf2-dma-contig.h>
31 /* -----------------------------------------------------------------------------
37 * corresponding in-memory formats to the table below!!!
128 * isp_video_mbus_to_pix - Convert v4l2_mbus_framefmt to v4l2_pix_format
[all …]
Dispccp2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CCP2 module
62 * ccp2_print_status - Print current CCP2 module register values.
65 dev_dbg(isp->dev, "###CCP2 " #name "=0x%08x\n", \
72 dev_dbg(isp->dev, "-------------CCP2 Register dump-------------\n"); in ccp2_print_status()
103 dev_dbg(isp->dev, "--------------------------------------------\n"); in ccp2_print_status()
107 * ccp2_reset - Reset the CCP2
122 dev_warn(isp->dev, in ccp2_reset()
130 * ccp2_pwr_cfg - Configure the power mode settings
138 ((isp->revision == ISP_REVISION_15_0 && isp->autoidle) ? in ccp2_pwr_cfg()
[all …]
/linux-6.14.4/drivers/media/platform/cadence/
Dcdns-csi2tx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Cadence MIPI-CSI2 TX Controller
5 * Copyright (C) 2017-2019 Cadence Design Systems Inc.
18 #include <media/mipi-csi2.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-fwnode.h>
22 #include <media/v4l2-subdev.h>
139 .colorspace = V4L2_COLORSPACE_DEFAULT,
163 if (code->pad || code->index >= ARRAY_SIZE(csi2tx_formats)) in csi2tx_enum_mbus_code()
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/linux-6.14.4/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
20 #include <linux/dma-mapping.h>
23 #include <media/cec-notifier.h>
25 #include <uapi/linux/media-bus-format.h>
39 #include "dw-hdmi-audio.h"
40 #include "dw-hdmi-cec.h"
41 #include "dw-hdmi.h"
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/linux-6.14.4/include/drm/display/
Ddrm_dp.h38 * MST: Multistream Transport - part of DP 1.2a
49 /* bits per component for non-RAW */
180 # define DP_MAX_SUPPORTED_RATES 8 /* 16-bit little-endian */
389 * 0x80-0x8f describe downstream port capabilities, but there are two layouts
444 * VESA DP-to-HDMI PCON Specification adds caps for colorspace
445 * conversion in DFP cap DPCD 83h. Sec6.1 Table-3.
464 /* DP-HDMI2.1 PCON DSC ENCODER SUPPORT */
470 /* DP-HDMI2.1 PCON DSC Version */
477 /* DP-HDMI2.1 PCON DSC RC Buffer block size */
485 /* DP-HDMI2.1 PCON DSC RC Buffer size */
[all …]
/linux-6.14.4/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
Ddcn10_hwseq.c67 hws->ctx
69 hws->regs->reg
73 hws->shifts->field_name, hws->masks->field_name
88 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in print_microsec()
106 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dcn10_lock_all_pipes()
107 old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
108 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
109 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
115 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
116 !pipe_ctx->stream || in dcn10_lock_all_pipes()
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/linux-6.14.4/drivers/gpu/drm/vc4/
Dvc4_plane.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Each DRM plane is a layer of pixels being scanned out by the HVS.
276 return state->fb && !WARN_ON(!state->crtc); in plane_enabled()
281 struct vc4_dev *vc4 = to_vc4_dev(plane->dev); in vc4_plane_duplicate_state()
282 struct vc4_hvs *hvs = vc4->hvs; in vc4_plane_duplicate_state()
286 if (WARN_ON(!plane->state)) in vc4_plane_duplicate_state()
289 vc4_state = kmemdup(plane->state, sizeof(*vc4_state), GFP_KERNEL); in vc4_plane_duplicate_state()
293 memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm)); in vc4_plane_duplicate_state()
296 if (vc4_state->upm_handle[i]) in vc4_plane_duplicate_state()
297 refcount_inc(&hvs->upm_refcounts[vc4_state->upm_handle[i]].refcount); in vc4_plane_duplicate_state()
[all …]
/linux-6.14.4/drivers/gpu/drm/rockchip/
Drockchip_drm_vop2.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Author: Andy Yan <andy.yan@rock-chips.com>
12 #include <linux/media-bus-format.h>
36 #include <dt-bindings/soc/rockchip,vop2.h>
45 +----------+ +-------------+ +-----------+
48 +----------+ +-------------+ +---------------+ +-------------+ +-----------+
49 +----------+ +-------------+ |N from 6 layers| | |
50 | Cluster | | Sel 1 from 6| | Overlay0 +--->| Video Port0 | +-----------+
52 +----------+ +-------------+ +---------------+ +-------------+ | LVDS |
53 +----------+ +-------------+ +-----------+
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