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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dingenic,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/ingenic,mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs MMC Controller
10 - Paul Cercueil <[email protected]>
13 - $ref: mmc-controller.yaml#
18 - enum:
19 - ingenic,jz4740-mmc
20 - ingenic,jz4725b-mmc
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/linux-6.14.4/arch/mips/boot/dts/ingenic/
Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "ingenic,jz4780";
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
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Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
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Dx1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
4 #include <dt-bindings/dma/x1000-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "jz4780.dtsi"
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
12 compatible = "img,ci20", "ingenic,jz4780";
22 stdout-path = &uart4;
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/linux-6.14.4/drivers/mmc/host/
Djz4740_mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <[email protected]>
6 * JZ4740 SD/MMC controller driver
13 #include <linux/dma-mapping.h>
18 #include <linux/mmc/host.h>
19 #include <linux/mmc/slot-gpio.h>
131 * The MMC core allows to prepare a mmc_request while another mmc_request
132 * is in-flight. This is used via the pre_req/post_req hooks.
150 struct mmc_host *mmc; member
192 if (host->version >= JZ_MMC_JZ4725B) in jz4740_mmc_write_irq_mask()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
9 bool "MMC host drivers debugging"
10 depends on MMC != n
13 say N here. This enables MMC host driver debugging. And further
18 tristate "Sunplus SP7021 MMC Controller"
43 Qcom SOCs and MMC, you would probably need this option to get DMA working.
94 implements a hardware byte swapper using a 32-bit datum.
106 support UHS2-capable devices.
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/linux-6.14.4/drivers/pinctrl/
Dpinctrl-ingenic.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <linux/pinctrl/pinconf-generic.h>
173 (!(enabled_socs & GENMASK(version - 1, 0)) in is_soc_or_above()
174 || jzpc->info->version >= version); in is_soc_or_above()
212 INGENIC_PIN_GROUP("mmc-1bit", jz4730_mmc_1bit, 1),
213 INGENIC_PIN_GROUP("mmc-4bit", jz4730_mmc_4bit, 1),
214 INGENIC_PIN_GROUP("uart0-data", jz4730_uart0_data, 1),
215 INGENIC_PIN_GROUP("uart1-data", jz4730_uart1_data, 1),
216 INGENIC_PIN_GROUP("uart2-data", jz4730_uart2_data, 1),
217 INGENIC_PIN_GROUP("uart3-data", jz4730_uart3_data, 1),
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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