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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dstarfive,jh7110-mmc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 to interface a SoC with storage medium such as eMMC or SD/MMC cards.
14 - $ref: synopsys-dw-mshc-common.yaml#
17 - William Qiu <[email protected]>
21 const: starfive,jh7110-mmc
28 - description: biu clock
29 - description: ciu clock
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/linux-6.14.4/Documentation/devicetree/bindings/soc/starfive/
Dstarfive,jh7110-syscon.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 SoC system controller
10 - William Qiu <[email protected]>
13 The StarFive JH7110 SoC system controller provides register information such
14 as offset, mask and shift to configure related modules such as MMC and PCIe.
19 - items:
20 - const: starfive,jh7110-sys-syscon
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/linux-6.14.4/drivers/mmc/host/
Ddw_mmc-starfive.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/mmc/host.h>
19 #include "dw_mmc-pltfm.h"
31 if (ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_UHS_DDR50) { in dw_mci_starfive_set_ios()
32 clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock; in dw_mci_starfive_set_ios()
33 ret = clk_set_rate(host->ciu_clk, clock); in dw_mci_starfive_set_ios()
35 dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock); in dw_mci_starfive_set_ios()
36 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_starfive_set_ios()
38 dev_dbg(host->dev, "Using the internal divider\n"); in dw_mci_starfive_set_ios()
60 struct dw_mci *host = slot->host; in dw_mci_starfive_execute_tuning()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
9 bool "MMC host drivers debugging"
10 depends on MMC != n
13 say N here. This enables MMC host driver debugging. And further
18 tristate "Sunplus SP7021 MMC Controller"
43 Qcom SOCs and MMC, you would probably need this option to get DMA working.
94 implements a hardware byte swapper using a 32-bit datum.
106 support UHS2-capable devices.
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/linux-6.14.4/arch/riscv/boot/dts/starfive/
Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "starfive,jh7110";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
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Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include "jh7110.dtsi"
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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