Searched +full:jh7110 +full:- +full:aon +full:- +full:syscon (Results 1 – 3 of 3) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/soc/starfive/ |
D | starfive,jh7110-syscon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: StarFive JH7110 SoC system controller 10 - William Qiu <[email protected]> 13 The StarFive JH7110 SoC system controller provides register information such 19 - items: 20 - const: starfive,jh7110-sys-syscon 21 - const: syscon [all …]
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/linux-6.14.4/arch/riscv/boot/dts/starfive/ |
D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive,jh7110-crg.h> 9 #include <dt-bindings/power/starfive,jh7110-pmu.h> 10 #include <dt-bindings/reset/starfive,jh7110-crg.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "starfive,jh7110"; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 #address-cells = <1>; [all …]
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/linux-6.14.4/drivers/pmdomain/starfive/ |
D | jh71xx-pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2022-2023 StarFive Technology Co., Ltd. 15 #include <dt-bindings/power/starfive,jh7110-pmu.h> 26 /* aon pmu register offset */ 87 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_get_state() 90 return -EINVAL; in jh71xx_pmu_get_state() 92 *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask; in jh71xx_pmu_get_state() 99 struct jh71xx_pmu *pmu = pmd->pmu; in jh7110_pmu_set_state() 107 spin_lock_irqsave(&pmu->lock, flags); in jh7110_pmu_set_state() 129 writel(mask, pmu->base + mode); in jh7110_pmu_set_state() [all …]
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